V

V Rana

23 records found

Single grain Si TFTs and local electrical properties of CSL boundaries

Single-Grain Si TFTs for flexible electronics and 3D-ICs

High Performance Single Grain Si TFTs Inside a Location-Controlled Grain by Micro-Czochralski Process with Capping Layer

Ingle-Grain Si TFTs and Circuits for Flexible Electronics and 3D-ICs

Defect States in Excimer-Laser Crystallized Single-Grain TFTs Studied with Isothermal Charge Deep-level Transient Spectroscopy

Single-grain Si TFTs and circuits fabricated through advanced excimer-laser crystallization

Single Grain TFTs and Circuits by¿ u-Czochralski Process
Doctoral thesis (2006) - V Rana (author)

Defect states in excimer-laser crystallized single-grain TFTs studied with isothermal charge deep-level transient spectroscopy

Gate oxide induced switch-on undershoot current observed in thin-film transistors

Electrical property of coincidence site lattice grain boundary in location-controlled Si island by excimer-laser crystallization

Capping layer on thin Si film for µ-Czochralski process with excimer laser crystallization

Switch-on undershoot current observed in thin film transistors

Dependence of single-crystalline Si TFT characteristics on the channel position inside a location-controlled grain

Single grain CMOS TFT inverter inside a location-controlled grain by µ-Czochralski process

Temperature dependent carrier transport in single-crystalline Si TFTs inside a location-controlled grain

Reduction of Kink current in single grain TFT's fabricated by u-Czochralski process

Single-crystalline Si CMOS TFT circuit fabricated inside a location-controlled grain by m-Czochralski process

High performance P-channel single-crystalline Si TFTs fabricated inside a location-controlledfrain by .-Czochralski process

Reliability of single-crystalline Si TFTs fabricated inside a location-controlled grain

Dependence of single-crystalline Si TFT characteristics on the channel position in a location-controlled grain