In semiconductor spin quantum bits (qubits), the radio-frequency (RF) gate-based readout is a promising solution for future large-scale integration, as it allows for a fast, frequency-multiplexed readout architecture, enabling multiple qubits to be read out simultaneously. This article introduces a theoretical framework to evaluate the effect of various parameters, such as the readout probe power, readout chain's noise performance, and integration time on the intrinsic readout signal-to-noise ratio, and thus readout fidelity of RF gate-based readout systems. By analyzing the underlying physics of spin qubits during readout, this work proposes a qubit readout model that takes into account the qubit's quantum mechanical properties, providing a way to evaluate the tradeoffs among the aforementioned parameters. The validity of the proposed model is evaluated by comparing the simulation and experimental results. The proposed analytical approach, the developed model, and the experimental results enable designers to optimize the entire readout chain effectively, thus leading to a faster, lower power readout system with integrated cryogenic electronics.

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Semiconductor spin qubits demonstrated single-qubit gates with fidelities up to 99.9 % benchmarked in the single-qubit subspace. However, tomographic characterizations reveal non-negligible crosstalk errors in a larger space. Additionally, it was long thought that the two-qubit gate performance is limited by charge noise, which couples to the qubits via the exchange interaction. Here, we show that coherent error sources such as a limited bandwidth of the control signals, diabaticity errors, microwave crosstalk, and non-linear transfer functions can equally limit the fidelity. We report a simple theoretical framework for pulse optimization that relates erroneous dynamics to spectral concentration problems and allows for the reuse of existing signal shaping methods on a larger set of gate operations. We apply this framework to common gate operations for spin qubits and show that simple pulse shaping techniques can significantly improve the performance of these gate operations in the presence of such coherent error sources. The methods presented in the paper were used to demonstrate two-qubit gate fidelities with F > 99.5 % in Xue et al (2022 Nature 601 343). We also find that single and two-qubit gates can be optimized using the same pulse shape. We use analytic derivations and numerical simulations to arrive at predicted gate fidelities greater than 99.9% with duration less than, 4 / ( Δ E z ) where Δ E z is the difference in qubit frequencies.

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As big strides were being made in many science fields in the 1970s and 80s, faster computation for solving problems in molecular biology, semiconductor technology, aeronautics, particle physics, etc., was at the forefront of research. Parallel and super-computers were introduced, which enabled problems of a higher level of complexity to be solved. At about the same time, Nobel-laureate physicist Richard Feynman launched what seemed at the time a wild idea; to build a computer based on quantum physics concepts such as superposition and entanglement [1]. The outrageousness of his ideas is documented in the book 'Surely, You're Joking, Mr. Feynman' [2].

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Micromagnet-based electric dipole spin resonance offers an attractive path for the near-term scaling of dense arrays of silicon spin qubits in gate-defined quantum dots while maintaining long coherence times and high control fidelities. However, accurately controlling dense arrays of qubits using a multiplexed drive will require an understanding of the cross-talk mechanisms that may reduce operational fidelity. We identify an unexpected cross-talk mechanism whereby the Rabi frequency of a driven qubit is drastically changed when the drive of an adjacent qubit is turned on. These observations raise important considerations for scaling single-qubit control.

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High-fidelity control of quantum bits is paramount for the reliable execution of quantum algorithms and for achieving fault tolerance—the ability to correct errors faster than they occur¹. The central requirement for fault tolerance is expressed in terms of an error threshold. Whereas the actual threshold depends on many details, a common target is the approximately 1% error threshold of the well-known surface code^2,3. Reaching two-qubit gate fidelities above 99% has been a long-standing major goal for semiconductor spin qubits. These qubits are promising for scaling, as they can leverage advanced semiconductor technology⁴. Here we report a spin-based quantum processor in silicon with single-qubit and two-qubit gate fidelities, all of which are above 99.5%, extracted from gate-set tomography. The average single-qubit gate fidelities remain above 99% when including crosstalk and idling errors on the neighbouring qubit. Using this high-fidelity gate set, we execute the demanding task of calculating molecular ground-state energies using a variational quantum eigensolver algorithm⁵. Having surpassed the 99% barrier for the two-qubit gate fidelity, semiconductor qubits are well positioned on the path to fault tolerance and to possible applications in the era of noisy intermediate-scale quantum devices.

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Quantum computers have been heralded as a novel paradigm for the solution of today's intractable problems, whereas the core principles of quantum computation are superposition, entanglement and interference, three fundamental properties of quantum mechanics [1]. A quantum computer generally comprises a quantum processor, made of an array of quantum bits or qubits, and a classical controller, which is used to control and read out the qubits. Quantum algorithms are generally mapped onto a circuit of quantum gates that operate on multiple qubits. Unlike conventional digital bits, qubits can take a coherent state ranging from |0〉 to |1〉 on a continuous sphere, known as the Bloch Sphere and they are implemented based on several mechanisms. While many solid-state implementations of qubits exist, an exhaustive description of available technologies is beyond the scope of this paper [2] [3].@en

Benchmarking the performance of a quantum computer is of key importance in identifying and reducing the error sources, and therefore in achieving fault-tolerant quantum computation. In the last decade, qubits made of electron spins in silicon emerged as promising candidates for practical quantum computers. To understand their physical properties and the engineering challenges behind, a complete characterization of coupled spin qubits is highly demanded. This dissertation presents extensive studies on performance benchmarking of silicon quantum processors, covering the aspects of quantum logic, quantum measurement, crosstalk and error correlations, and cryogenic quantum control. The first experiment presented in this dissertation reports the complete characterization of a universal set of quantum gates for silicon spin qubits. As a powerful alternative to conventional Clifford-based single- and two-qubit randomized benchmarking, we introduce a new approach named character randomized benchmarking. We use it to extract a fidelity of 92% for a controlled-Z gate, and show that the crosstalk and error correlations between simultaneous single-qubit gates can be quantified in the same experiment. The second experiment is focused on the spatial noise correlation between two idling spin qubits. Such correlated noise is critical in quantum error correction. We characterize such correlations by measuring the coherence times of two different two-qubit Bell states with parallel and anti-parallel spins respectively, and find only modest correlations. This is likely due to the existence of uncorrelated nuclear noise arising from ^29Si atoms. In the third experiment, we observe strong nonlinear effects in electric-dipole spin resonance, which is the key mechanism for implementing single-qubit gates in all works presented in this dissertation. Importantly, this induces a novel crosstalk effect between simultaneously driven qubits. The valley-orbit hybridization is investigated and found to give a phenomenological explanation of such nonlinearity. Further studies in material properties and microwave heating effects are needed to explain the discrepancy. The fourth experiment is about quantum nondemolition measurement of a spin qubit, which is an essential building block of quantum error correction codes. Helped by an ancilla qubit, we can significantly improve the readout fidelity of the data qubit from ∼75% to ∼95% after 15 repetitive measurements. We experimentally test an improved signal processing method, namely soft decoding, and showcase its advantage when Gaussian noise dominates the readout errors. In the fifth experiment, we finally break the barrier of 99% for the fidelity of the two-qubit gate for semiconductor spin qubits. Combining isotopically purified silicon, careful Hamiltonian engineering of exchange interactions, and error diagnosis from gate set tomography, we achieve fidelities of all single- and two-qubit gates of over 99.5%, well above the popular surface code error threshold. Powered by the high-fidelity universal gate set, we are able to execute a variational quantum eigensolver routine for computing the dissociation energy of molecular hydrogen with the silicon quantum processor. The last experiment steers the focus towards the interface between quantum processor and classical control electronics, known as a major bottleneck in scaling. We propose to solve the problem by utilizing control circuits working at a few Kelvin. A control chip named "Horse Ridge'' is therefore tested at 3 Kelvin and demonstrated to match the same control fidelities obtained using bulky commercial instruments working at room temperature, at a cost of only a few hundred milliwatts. The functionality of this control chip is further tested by operating universal two-qubit logic as well as executing a two-qubit Deutsch-Josza algorithm. At the end of this dissertation, we propose a few possible next-steps to further explore the error sources in spin qubits and approaches for scalable operations.@en

Electron spins in Si/SiGe quantum wells suffer from nearly degenerate conduction band valleys, which compete with the spin degree of freedom in the formation of qubits. Despite attempts to enhance the valley energy splitting deterministically, by engineering a sharp interface, valley splitting fluctuations remain a serious problem for qubit uniformity, needed to scale up to large quantum processors. Here, we elucidate and statistically predict the valley splitting by the holistic integration of 3D atomic-level properties, theory and transport. We find that the concentration fluctuations of Si and Ge atoms within the 3D landscape of Si/SiGe interfaces can explain the observed large spread of valley splitting from measurements on many quantum dot devices. Against the prevailing belief, we propose to boost these random alloy composition fluctuations by incorporating Ge atoms in the Si quantum well to statistically enhance valley splitting.

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The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications¹. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)². When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’^3–6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots^7–9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm¹⁰, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.

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Quantum computers (QC), comprising qubits and a classical controller, can provide exponential speed-up in solving certain problems. Among solid-state qubits, transmons and spin-qubits are the most promising, operating « 1K. A qubit can be implemented in a physical system with two distinct energy levels representing the |0) and |1) states, e.g. the up and down spin states of an electron. The qubit states can be manipulated with microwave pulses, whose frequency f matches the energy level spacing E = hf (Fig. 19.1.1). For transmons, f 6GHz, for spin qubits f20GHz, with the desire to lower it in the future. Qubit operations can be represented as rotations in the Bloch sphere. The rotation axis is set by the phase of the microwave signal relative to the qubit phase, which must be tracked for coherent operations. The pulse amplitude and duration determine the rotation angle. A π-rotation is typically obtained using a 50ns Gaussian pulse for transmons and a 500ns rectangular pulse for spin qubits with powers of -60dBm and -45dBm, respectively.

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The mission of QuTech is to bring quantum technology to industry and society by translating fundamental scientific research into applied research. To this end we are developing Quantum Inspire (QI), a full-stack quantum computer prototype for future co-development and collaborative R&D in quantum computing. A prerelease of this prototype system is already offering the public cloud-based access to QuTech technologies such as a programmable quantum computer simulator (with up to 31 qubits) and tutorials and user background knowledge on quantum information science (www.quantum-inspire.com). Access to a programmable CMOS-compatible Silicon spin qubit-based quantum processor will be provided in the next deployment phase. The first generation of QI's quantum processors consists of a double quantum dot hosted in an in-house grown SiGe/²⁸Si/SiGe heterostructure, and defined with a single layer of Al gates. Here we give an overview of important aspects of the QI full-stack. We illustrate QI's modular system architecture and we will touch on parts of the manufacturing and electrical characterization of its first generation two spin qubit quantum processor unit. We close with a section on QI's qubit calibration framework. The definition of a single qubit Pauli X gate is chosen as concrete example of the matching of an experiment to a component of the circuit model for quantum computation.

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Building a large-scale quantum computer requires the co-optimization of both the quantum bits (qubits) and their control electronics. By operating the CMOS control circuits at cryogenic temperatures (cryo-CMOS), and hence in close proximity to the cryogenic solid-state qubits, a compact quantum-computing system can be achieved, thus promising scalability to the large number of qubits required in a practical application. This work presents a cryo-CMOS microwave signal generator for frequency-multiplexed control of 4\times 32 qubits (32 qubits per RF output). A digitally intensive architecture offering full programmability of phase, amplitude, and frequency of the output microwave pulses and a wideband RF front end operating from 2 to 20 GHz allow targeting both spin qubits and transmons. The controller comprises a qubit-phase-tracking direct digital synthesis (DDS) back end for coherent qubit control and a single-sideband (SSB) RF front end optimized for minimum leakage between the qubit channels. Fabricated in Intel 22-nm FinFET technology, it achieves a 48-dB SNR and 45-dB spurious-free dynamic range (SFDR) in a 1-GHz data bandwidth when operating at 3 K, thus enabling high-fidelity qubit control. By exploiting the on-chip 4096-instruction memory, the capability to translate quantum algorithms to microwave signals has been demonstrated by coherently controlling a spin qubit at both 14 and 18 GHz.

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We study spatial noise correlations in a Si/SiGe two-qubit device with integrated micromagnets. Our method relies on the concept of decoherence-free subspaces, whereby we measure the coherence time for two different Bell states, designed to be sensitive only to either correlated or anticorrelated noise, respectively. From these measurements we find weak correlations in low-frequency noise acting on the two qubits, while no correlations could be detected in high-frequency noise. We expect nuclear spin noise to have an uncorrelated nature. A theoretical model and numerical simulations give further insight into the additive effect of multiple independent (anti)correlated noise sources with an asymmetric effect on the two qubits as can result from charge noise. Such a scenario in combination with nuclear spins is plausible given the data and the known decoherence mechanisms. This work is highly relevant for the design of optimized quantum error correction codes for spin qubits in quantum dot arrays, as well as for optimizing the design of future quantum dot arrays.

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Quantum error correction is of crucial importance for fault-tolerant quantum computers. As an essential step toward the implementation of quantum error-correcting codes, quantum nondemolition measurements are needed to efficiently detect the state of a logical qubit without destroying it. Here we implement quantum nondemolition measurements in a Si/SiGe two-qubit system, with one qubit serving as the logical qubit and the other serving as the ancilla. Making use of a two-qubit controlled-rotation gate, the state of the logical qubit is mapped onto the ancilla, followed by a destructive readout of the ancilla. Repeating this procedure enhances the logical readout fidelity from 75.5±0.3% to 94.5±0.2% after 15 ancilla readouts. In addition, we compare the conventional thresholding method with an improved signal processing method called soft decoding that makes use of analog information in the readout signal to better estimate the state of the logical qubit. We demonstrate that soft decoding leads to a significant reduction in the required number of repetitions when the readout errors become limited by Gaussian noise, for instance, in the case of readouts with a low signal-to-noise ratio. These results pave the way for the implementation of quantum error correction with spin qubits in silicon.

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Cryogenic CMOS (cryo-CMOS) is a viable technology for the control interface of the large-scale quantum computers able to address non-trivial problems. In this paper, we demonstrate state-of-the-art cryo-CMOS circuits and systems for such application and we discuss the challenges still to be faced on the path towards practical quantum computers.

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Randomized benchmarking is a technique for estimating the average fidelity of a set of quantum gates. However, if this gateset is not the multi-qubit Clifford group, robustly extracting the average fidelity is difficult. Here, we propose a new method based on representation theory that has little experimental overhead and robustly extracts the average fidelity for a broad class of gatesets. We apply our method to a multi-qubit gateset that includes the T-gate, and propose a new interleaved benchmarking protocol that extracts the average fidelity of a two-qubit Clifford gate using only single-qubit Clifford gates as reference.

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We report the first complete characterization of single-qubit and two-qubit gate fidelities in silicon-based spin qubits, including cross talk and error correlations between the two qubits. To do so, we use a combination of standard randomized benchmarking and a recently introduced method called character randomized benchmarking, which allows for more reliable estimates of the two-qubit fidelity in this system, here giving a 92% fidelity estimate for the controlled-Z gate. Interestingly, with character randomized benchmarking, the two-qubit gate fidelity can be obtained by studying the additional decay induced by interleaving the two-qubit gate in a reference sequence of single-qubit gates only. This work sets the stage for further improvements in all the relevant gate fidelities in silicon spin qubits beyond the error threshold for fault-tolerant quantum computation.

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