Addressing and mitigating decoherence sources plays an essential role in the development of a scalable quantum computing system, which requires low gate errors to be consistently maintained throughout the circuit execution. While nuclear spin-free materials, such as isotopically purified silicon, exhibit intrinsically promising coherence properties for electron spin qubits, the omnipresent charge noise, when converted to magnetic noise under a strong magnetic field gradient, often hinders stable qubit operation within a time frame comparable to the data acquisition time. Here, we demonstrate both open- and closed-loop suppression techniques for the transduced noise in silicon spin qubits, resulting in a more than two-fold (ten-fold) improvement of the inhomogeneous coherence time (Rabi oscillation quality) that leads to a single-qubit gate fidelity of over 99.6% even in the presence of a strong decoherence field gradient. Utilizing gate set tomography, we show that adaptive qubit control also reduces the non-Markovian noise in the system, which validates the stability of the gate fidelity. The technique can be used to learn multiple Hamiltonian parameters and is useful for the intermittent calibration of the circuit parameters with affordable experimental overhead, providing a useful subroutine during the repeated execution of general quantum circuits.

The electrical characterisation of classical and quantum devices is a critical step in the development cycle of heterogeneous material stacks for semiconductor spin qubits. In the case of silicon, properties such as disorder and energy separation of conduction band valleys are commonly investigated individually upon modifications in selected parameters of the material stack. However, this reductionist approach fails to consider the interdependence between different structural and electronic properties at the danger of optimising one metric at the expense of the others. Here, we achieve a significant improvement in both disorder and valley splitting by taking a co-design approach to the material stack. We demonstrate isotopically purified, strained quantum wells with high mobility of 3.14(8) × 10⁵ cm² V⁻¹ s⁻¹ and low percolation density of 6.9(1) × 10¹⁰ cm⁻². These low disorder quantum wells support quantum dots with low charge noise of 0.9(3) μeV Hz^−1/2 and large mean valley splitting energy of 0.24(7) meV, measured in qubit devices. By striking the delicate balance between disorder, charge noise, and valley splitting, these findings provide a benchmark for silicon as a host semiconductor for quantum dot qubits. We foresee the application of these heterostructures in larger, high-performance quantum processors.

Qubits that can be efficiently controlled are essential for the development of scalable quantum hardware. Although resonant control is used to execute high-fidelity quantum gates, the scalability is challenged by the integration of high-frequency oscillating signals, qubit cross-talk, and heating. Here, we show that by engineering the hopping of spins between quantum dots with a site-dependent spin quantization axis, quantum control can be established with discrete signals. We demonstrate hopping-based quantum logic and obtain single-qubit gate fidelities of 99.97%, coherent shuttling fidelities of 99.992% per hop, and a two-qubit gate fidelity of 99.3%, corresponding to error rates that have been predicted to allow for quantum error correction. We also show that hopping spins constitute a tuning method by statistically mapping the coherence of a 10-quantum dot system. Our results show that dense quantum dot arrays with sparse occupation could be developed for efficient and high-connectivity qubit registers.

Gate-defined quantum dots in silicon-germanium heterostructures have become a compelling platform for quantum computation and simulation. Thus far, developments have been limited to quantum dots defined in a single plane. Here, we propose to advance beyond planar systems by exploiting heterostructures with multiple quantum wells. We demonstrate the operation of a gate-defined double quantum dot in a strained germanium double quantum well, where both quantum dots are tunnel coupled to both reservoirs and parallel transport occurs. We analyze the capacitive coupling to nearby gates and find both quantum dots to be accumulated under the central plunger gate. We extract their position and size, from which we conclude that the double quantum dots are vertically stacked in the two quantum wells. We discuss the challenges and opportunities of multilayer devices and outline some potential applications in quantum computing and quantum simulation.

We grow strained Ge/SiGe heterostructures by reduced-pressure chemical vapor deposition on 100 mm Ge wafers. The use of Ge wafers as substrates for epitaxy enables high-quality Ge-rich SiGe strain-relaxed buffers with a threading dislocation density of ( 6 ± 1 ) × 10 5 cm − 2 , nearly an order of magnitude improvement compared to control strain-relaxed buffers on Si wafers. The associated reduction in short-range scattering allows for a drastic improvement of the disorder properties of the two-dimensional hole gas, measured in several Ge/SiGe heterostructure field-effect transistors. We measure an average low percolation density of ( 1.22 ± 0.03 ) × 10 10 cm − 2 and an average maximum mobility of ( 3.4 ± 0.1 ) × 10 6 cm 2 / Vs and quantum mobility of ( 8.4 ± 0.5 ) × 10 4 cm 2 / Vs when the hole density in the quantum well is saturated to ( 1.65 ± 0.02 ) × 10 11 cm − 2 . We anticipate immediate application of these heterostructures for next-generation, higher-performance Ge spin-qubits, and their integration into larger quantum processors.

Electron spins in Si/SiGe quantum wells suffer from nearly degenerate conduction band valleys, which compete with the spin degree of freedom in the formation of qubits. Despite attempts to enhance the valley energy splitting deterministically, by engineering a sharp interface, valley splitting fluctuations remain a serious problem for qubit uniformity, needed to scale up to large quantum processors. Here, we elucidate and statistically predict the valley splitting by the holistic integration of 3D atomic-level properties, theory and transport. We find that the concentration fluctuations of Si and Ge atoms within the 3D landscape of Si/SiGe interfaces can explain the observed large spread of valley splitting from measurements on many quantum dot devices. Against the prevailing belief, we propose to boost these random alloy composition fluctuations by incorporating Ge atoms in the Si quantum well to statistically enhance valley splitting.

Atom probes generate three-dimensional atomic-scale tomographies of material volumes corresponding to the size of modern-day solid-state devices. Here, the capabilities of atom probe tomography are evaluated to analyze buried interfaces in semiconductor heterostructures relevant for electronic and quantum devices. Employing brute-force search, the current dominant reconstruction protocol to generate tomographic three-dimensional images from Atom Probe data is advanced to its limits. Using Si/SiGe heterostructure for qubits as a model system, the authors show that it is possible to extract interface properties like roughness and width that agree with transmission electron microscopy observations on the sub-nanometer scale in an automated and highly reproducible manner. The demonstrated approach is a versatile method for atomic-scale characterization of buried interfaces in semiconductor heterostructures.