Semiconductor quantum dots (QDs) are a promising platform for multiple different qubit implementations, all of which are voltage controlled by programmable gate electrodes. However, as the QD arrays grow in size and complexity, tuning procedures that can fully autonomously handle the increasing number of control parameters are becoming essential for enabling scalability. We propose a bootstrapping algorithm for initializing a depletion-mode QD device in preparation for subsequent phases of tuning. During bootstrapping, the QD device functionality is validated, all gates are characterized, and the QD charge sensor is made operational. We demonstrate the bootstrapping protocol in conjunction with a coarse-tuning module, showing that the combined algorithm can efficiently and reliably take a cooled-down QD device to a desired global-state configuration in under 8 min, with a success rate of 96%. Finally, by following heuristic approaches to QD device initialization and combining the efficient ray-based measurement with the rapid radio-frequency reflectometry measurements, the proposed algorithm establishes a reference in terms of performance, reliability, and efficiency against which alternative algorithms can be benchmarked.

Quantum dot arrays are a versatile platform for the implementation of spin qubits, as high-bandwidth sensor dots can be integrated with single-, double-, and triple-dot qubits yielding fast and high-fidelity qubit readout. However, for undoped silicon devices, reflectometry off sensor ohmics suffers from the finite resistivity of the two-dimensional electron gas (2DEG), and alternative readout methods are limited to measuring qubit capacitance, rather than qubit charge. By coupling a surface-mount resonant circuit to the plunger gate of a high-impedance sensor, we realized a fast charge sensing technique that is compatible with resistive 2DEGs. We demonstrate this by acquiring at high speed charge stability diagrams of double- and triple-dot arrays in Si/SiGe heterostructures as well as pulsed-gate single-shot charge and spin readout with integration times as low as 2.4 μs.

Spins in gate-defined silicon quantum dots are at the forefront of solid-state qubit research. We characterize top-gated devices fabricated from Si/SiGe heterostructures, demonstrating the formation of stable double and triple quantum dots with proximal charge-sensing dots. We also demonstrate fabrication of linear dot arrays with overlapping gate technology, thereby significantly increasing the density of control electrodes relative to our single-gate-layer devices.