A fully integrated RFDAC based phase modulator in 40nm bulk CMOS is presented. To boost in-band linearity and the frequency range of operation, a harmonic rejection RFDAC architecture that suppresses the 3^rd and 5^th harmonics is proposed. The achieved frequency agility of the phase modulator is verified over a 0.6-2.5GHz range yielding EVM of -34.5dB and -36dB for an 18Mb/s and 75Mb/s GMSK signals, respectively. The power consumption of the proposed phase modulator is 33 mW at 2.4GHz.

The maximum achievable linearity of a digital polar transmitter (DPTX) is mainly constrained by two RF-DAC associated nonidealities; namely, aliasing of sampling spectral replicas (SSR) of the AM and PM signals, and the presence of nonuniform quantization noise. In this work, using DPTX hardware linearization, in combination with PM SSR filtering and iterative learning control (ILC) algorithm improved by look-up tables (LUT), a CMOS DPTX is linearized close to its theoretical ACPR and EVM limits as predicted by its resolution. Using the ILC technique as underlying basis, an effective real-time direct-learning digital predistortion (DPD) technique is proposed. Measurement results show -60/-53 dBc ACPR and -60/-47 dB EVM using the ILC algorithm for 16/64 MHz OFDM signals, and -55/-48 dBc ACPR and -50/-44 dB EVM using the proposed DPD for 16/64 MHz OFDM signals. To the best of author's knowledge, this is the highest linearity reported for a DPTX operating with wideband signals.

With the proliferation of wireless networks, there is a need for more compact, low-cost, power efficient transmitters that are capable of supporting the various communication standards, including Bluetooth, WLAN, GSM/EDGE, WCDMA and 4G of 3GPP cellular. This book describes a novel idea of RF digital-to-analog converters (RFDAC) and demonstrates how they can realize all-digital, fully-integrated RF transmitters that support all the current multi-mode and multi-band communication standards. With this book the reader will: Understand the challenges of realizing a universal CMOS RF transmitter. Recognize the design issues and the advantages and disadvantages related to analog and digital transmitter architectures. Master designing an RF transmitter from system level modeling techniques down to circuit designs and their related layout know-hows. Grasp digital polar and I/Q calibration techniques as well as the digital predistortion approaches. Learn how to generate appropriate digital I/Q baseband signals in order to apply them to the test chip and measure the RF-DAC performance. Highlights the benefits and implementation challenges of software-defined transmitters using CMOS technology. Includes various types of analog and digital RF transmitter architectures for wireless applications. Presents an all-digital polar RFDAC transmitter architecture and describes in detail its implementation. Presents a new all-digital I/Q RFDAC transmitter architecture and its implementation. Provides comprehensive design techniques from system level to circuit level. Introduces several digital predistortion techniques which can be used in RF transmitters. Describes the entire flow of system modeling, circuit simulation, layout techniques and the measurement process.