Graphene, despite its exceptional electrical properties, is not suitable as a channel material in field-effect transistors due to its zero band gap. Engineered graphene structures, such as graphene nanoribbons, have been proposed to overcome this limitation. However, nanoribbons, while offering an opened band gap and favourable current on/off ratios, suffer from low individual driving currents. Graphene nanomesh provides a potential solution by maintaining the benefits of nanoribbons while offering higher driving currents due to its two-dimensional structure. However, fabricating graphene nanomesh remains challenging.
This study investigates the fabrication of graphene nanomesh using a transfer-free anodization method with nanoporous anodic alumina as a hard mask in a plasma etching process. Unlike previously published methods, which require the transfer of brittle alumina masks, this work develops a process where anodization is performed directly on aluminium deposited on top of graphene. A two-step anodization process was tested and optimized using aluminium on silicon samples, including the development of a partial stripping variation aimed at preserving pore ordering.
Initial tests on Al-on-Si samples demonstrated promising results, with plasma etching yielding uniform patterns when using the partial stripping technique. However, when applied to graphene samples, significant challenges were encountered. Poor adhesion between aluminium and graphene layers resulted in delamination and bubbling during anodization, disrupting the pore formation process and leading to defects. Efforts to improve adhesion through patterning of the substrate showed no substantial improvements. However, it was confirmed that the Mo and the graphene survived the anodization process.
Although plasma etching produced positive results in regions where delamination was minimized, etching on graphene samples remained inconsistent. Despite these challenges, the study provides valuable insights into the fabrication process, particularly regarding mask stability and adhesion issues.

The increasing demand for precise light control in biomedical research, especially in fields like optogenetics and liquid crystal elastomers (LCEs), has exposed the limitations of traditional light sources regarding precision, controllability, and size. To address these challenges, this research focuses on developing miniaturized LED matrix systems capable of producing high-precision, high-power customizable light patterns essential for complex biological experiments. Two mini LED matrix systems—a 48x32 matrix and a larger 160x160 matrix—were designed and developed to achieve precise modulation of light intensity and patterns. These systems were tailored to meet the rigorous requirements of optogenetic experiments, which demand precise control over cellular activities, and to explore the potential applications in light-responsive LCEs. Controlling the light-responsive behavior of LCEs is critical for advancements in soft robotics, artificial muscles, and other applications requiring adjustable light sources. The 48x32 mini LED matrix system was successfully applied to control cardiac activity through optogenetics, demonstrating its ability to modulate light for inducing and terminating arrhythmias precisely. Additionally, its integration into LCE experiments showed promise for broader biomedical applications. Building on this success, the development of a larger 160x160 mini LED matrix system extended the technology’s applicability, supporting larger-scale experimental setups and human-sized models. By providing innovative solutions to the challenges of precise light control in biomedical research, this work opens new possibilities for experimental and clinical applications, offering significant contributions to the field.

The bandgap limitation of silicon (Si) limits the imaging capabilities of conventional Si CMOS Image Sensors to wavelengths below 1100 nm and thus are inadequate for near-infrared (NIR) / short-wave infrared (SWIR) imaging applications such as metrology, medical imaging and computer vision. Current SWIR image sensors, while capable of detecting wavelengths up to 2000 nm, suffer from several critical drawbacks: they are incompatible with CMOS technology, lack the scalability inherent to CMOS processes, and are prohibitively expensive.

This thesis presents the design and simulation of a CMOS-compatible microstructured germanium-on-silicon (Ge-on-Si) visible and SWIR wideband image sensor. The proposed design uses light-trapping microstructures on the sensor's surface to help enhance the optical efficiency of the infrared-sensitive germanium layer while maintaining compatibility with standard CMOS fabrication techniques. The proposed design is highly scalable, with diffusion-drift and finite-difference time-domain (FDTD) simulations of pixels with 5 um, 15 um and 55 um pitches demonstrating a quantum efficiency of 28% at 1000 nm and 2% at 1300 nm using only a 100 nm Ge layer while also being compatible with the 4T-pixel active pixel sensor (APS) architecture. With future developments using 1 µm Ge layer potentially allowing for QE over 40% across the entire visible+NIR/SWIR spectrum, such a design will enable integrated wideband integrated imaging applications that can utilize the developments of existing CMOS image sensors.

Graphene-based neural interfaces offer an innovative solution to surpass the resolution limit of traditional neural recording, integrating neuroelectronics with optogenetics for combined electrophysiological and optical neural monitoring, among others. Three important factors in these interfaces are achieving a high signal-to-noise ratio (SNR), maintaining effective stimulation properties, and ensuring strong cell adhesion to neural tissue, which can be enhanced through surface topography modifications. This work explores two main approaches to enhance graphene-based neural interfaces: (1) exploring the creation of thin graphene films on molybdenum to integrate transistors and electrodes within a single fabrication process, which can potentially enhance the signal-to-noise ratio (SNR) while maintaining stimulation efficacy; and (2) creating corrugated graphene structures that increase surface area and improve cell adhesion. A major challenge in this work is establishing a transfer-free chemical vapor deposition (CVD) process on molybdenum for both approaches. While this method offers significant benefits, such as reducing defects and contamination, the challenge lies in the limited understanding of the mechanisms behind graphene growth on this catalyst. Exploring new molybdenum configurations to provide a better understanding of the graphene growth mechanism on this catalyst is also a relevant part of this work.
Experiments revealed that graphene grown on thick, unpatterned molybdenum produced high quality few layer graphene (FLG), while patterned thick molybdenum produced multilayer structures with high defect density. Based on the results obtained, a mechanism for graphene growth on thick molybdenum catalysts is proposed. However, the decision was made to proceed with the second research approach due to time limitations. Considering corrugated graphene structures, Raman analysis showed higher-quality graphene layers within the valleys, fact that supports the proposed growth model. sheet resistance values ranged from 60 Ω/sq – 180 Ω/sq, being these values among the lowest reported in the literature for undoped graphene. These low values are attributed to the combination of an FLG graphene with good interlayer electronic coupling, which is possible because of the low number of defects in the material. Results are promising for enabling high-density optically transparent neural interfaces with graphene tracks. Additionally, small and denser corrugations enhanced the electrode surface area, showing reduced impedance at 1 kHz compared to flat electrodes. Electrodes with 1 μm, 5 μm, and 20 μm corrugations shown impedance reductions in comparison to flat electrodes, demonstrating an increased surface area. The area normalized impedance decreased from 35.5 kΩ ± 0.7 kΩ for flat electrodes to a minimum of 26.2 kΩ ± 1.1 kΩ. The electrodes achieved a maximum charge storage capacity (CSC) of 80.6 μC/cm2 and a maximum charge injection capacity (CIC) of 7.71 μC/cm2, which are lower than the threshold for stimulation applications. However, these values could be potentially optimized through fabrication refinement. Furthermore, the biocompatibility tests indicated that corrugated graphene patterns are biocompatible have the potential to actively influence stem cell cytoskeleton dynamics, highlighting their promise as a safe and novel inclusion in interfaces for next- generation neural applications.

In various metrological imaging applications, such as astronomical studies and medical applications, the incident illumination from the image is focused densely on certain regions of the image and sparsely spread over others. Ideally, the sensor's pixels have high spatial resolution at regions of interest to provide high resolution and distinguish features of the image. Similarly, larger, low-resolution pixels are preferred in regions of sparsely distributed information.

As pixel readouts form a significant portion of an image sensor's power budget, larger low-power pixels should dominate the background locations to lower the number of readouts and power consumption. Since different applications may have different regions tending to dense and sparse incidence, the presence of high-resolution and low-resolution pixels should be configurable. This work aims to research an image sensor whose spatial resolution is configurable at different locations on the chip.

The primary goal of this thesis work is:
To create a CMOS-based image sensor named FlexCAM with adaptable (by utilizing control gates and proper biasing schemes) resolution modes for:
a) High spatial resolution at regions of interest where the signal is dense. Here, each pixel is read through its amplifier
b) Low spatial resolution at regions where the signal is sparse, utilizing charge binning onto a focal pixel. Here, only the amplifier of the focal pixel is activated, thus reducing power consumption.
Additionally, this thesis will include the optical and electrical design trade-offs, the design of the foundry process flow, and details of the proposed experimental setup. The work also provides preliminary simulations for proof-of-concept for both resolution modes.

Most injuries in football occur in the lower extremities due to high muscle stress. To prevent such injuries, the Dutch Football Association (KNVB) and the Delft University of Technology developed the Smart Sensor Shorts, an inertial sensor-based tracking system measuring the athlete’s lower body kinematics, to improve physical load estimates during training sessions and matches. However, the system currently only has offline data analysis software, which results in poor monitoring capability.

This thesis proposes a near real-time data analysis system for Smart Sensor Shorts, featuring an automatic sensor calibration module, a football-specific activity recognition module, and a user interface, to monitor users' lower limb movement and load during football training. The proposed automatic sensor-to-body calibration algorithm maintains a high calibration accuracy with an 18.92º(±5.74º) calibration error on average and simplifies the calibration process by leveraging detected standing and walking movements to estimate calibration parameters. The proposed gradient-boosting decision trees activity recognition model utilizes hip joint angles and joint angular velocities derived by the system to predict users' football-related activities, achieving an overall accuracy of 93.62%. The designed system processes the data recorded by IMUs in real time with a speed of 21 milliseconds per iteration and displays the calculated results related to the user's physical load on the user interface at a frame rate of 20 Hz.

Classical computer have difficulties simulating specific complex problems, therefore other computation options are being explored. One of these options is the quantum computer, which is expected to excel in various industries. The challenge for the quantum computer is scaling it up to a high number of qubits. The diamond-based quantum computer is a suitable candidate for quantum computer, because it can be made scalable, with long coherence times, relatively high temperatures and low cross talk. Making such a scalable modular quantum computer using diamond qubits requires heterogeneous integration of optical components. Multiple integrations techniques for optical components exist, however in this thesis we are particularly interested in integrating a superconducting nanowire single photon detector (SNSPD) with pick & place onto the quantum chip to read out the photons emitted by diamond color-centers. The main goal of this thesis is to find out which integration scheme leads to the highest on-chip detection efficiency of a pick & place on waveguide integrated SNSPD.

In this work we designed a silicon nitride structure with low loss tapered support structures. Next different releasing methods are introduced to release the fabricated silicon nitride structure independent of the material stack and with a high yield. Lastly, we show how waveguide structures can be pick & placed on receptor chips that underwent surface treatment.

As silicon carbide(SiC) gets more and more attention from the semiconductor industry due to its robust mechanical and chemical properties, reliable and standardized processing technologies such as reactive ion etching(RIE) for SiC are in great demand. This is because of the difficulty and challenge of fabricating micro devices on the SiC substrate. Although the high hardness and chemical inertness make SiC a good candidate for applications such as sensors in harsh environments, they also impede the development of SiC-based devices when considering processing. This thesis aims to develop a standardized inductively coupled plasma(ICP) reactive ion etching(RIE) process for 4H-SiC substrate etching. The developed process is expected to be applied in the fabrication of micro-electro-mechanical systems(MEMS). The specifications are a high etch rate, micro-masking-free surface, and high selectivity. First, a literature review was conducted to comprehensively study the characteristics of the SiC material and the mechanisms of the ICP RIE process. Second, a baseline recipe was developed guided by the theory studied in the literature works. Third, initial tests were conducted, and the preliminary optimizations with a focus on etch rate and micro masking suppression were performed. Fourth, the design of experiments(DOE) based on the preliminarily optimized recipe was conducted to study the effect of process parameters on etch rate, etch profile, and selectivity. Last, the optimized recipes with a focus on etch rate, etch profile, and selectivity were summed and listed. The achieved maximum etch rate was 1.26 µm/min. The maximum selectivity of the hard mask material to SiC was 153 when the nickel hard mask was used. Amicro-masking-free surface of SiC was achieved.

GaN transistors have advantages over conventional Si MOSFETs, such as lower on-resistance, lower parasitic capacitance, higher break-down voltage, etc. However, due to the lack of the body diode, when GaN transistors conduct reverse current during dead time, the source-drain voltage (VSD) can be very large (up to 4-5 V, depending on the output current). High reverse conduction voltage leads to large power loss during dead time for the GaN class D amplifier. In this project, a dead time control circuit is proposed. With the dead time control circuit, the dead time can be reduced from a large default value to around 5 ns. The output power of the class D amplifier can be improved, and the third-order harmonic distortion can also be improved by 5-10 dB for different corners and temperatures.

Distributing power and data around a garment is a common problem in sensor enabled e-textiles, as connecting separate electronic subsystems together using connectors and wires has proven to be unreliable and cumbersome. In this work a solution is presented that will eliminate the connectors by using two pairs of short-range wireless inductive links. The proposed system is able carry power from one node to the next, while at the same time facilitating data transfer between the nodes. In this work the double inductive link is analysed, and a novel compensation topology is presented. A modified class-E amplifier is proposed to generate a carrier signal, improving the system settling time. Using a placeholder data protocol the system is able to transmit 62mW of regulated power to an external load at a total efficiency of 7.3%, while simultaneously transmitting data at a rate of 8.5kbit/s. Without data transmission it is able to deliver 185mW of DC power at 6.09V unregulated, at an efficiency of 23%. The system is also shown to be capable of handling a maximum bitstream of 240kbit/s.

In this work, a SPAD-based LiDAR system is studied. In particular, the system employs a direct time-of-flight (dToF) method to reconstruct a target-reflected pulses using histogram, from which the distance to the target is estimated. More particularly, a time correlated single photon counting (TCSPC) method has been used to record the flight time of pulses. Such method assumes and successfully reconstructs the returned pulses in a photon starved condition, but fails under strong background noise. The increase in average photon counts per detection range limits the detection range, thereby rendering the system impractical for an automotive application where strong sunlight is present. The techniques proposed in this work, namely the asynchronous gating technique and the adaptive TDC gating technique, have been simulated for the SPAD-based LiDAR system and achieves a reliable detection range of 74m and reduces the required memory size by at least a factor of 14 in comparison to the system without a data compression technique, respectively.

In-pixel time-to-digital (TDC) converters are further studied in this work. In doing so, a novel Figure-of-Merits (FoM) is proposed, which illustrates a logarithmic relation between the proposed FoM and the technology node and that the ring oscillator architecture achieves a small form factor. Accordingly, a ring oscillator architecture is studied with various delay cell topologies, which are simulated and compared against each other. The stacked-inverter topology, biased by current sources, consumes the lowest power and suceptibilty to supply variation, while exhibiting comparable supply sensitivity and jitter with respect to compared topologies. It is therefore concluded that the stacked-inverter topology shall be considered as a delay cell topology when designing a ring oscillator based large array of in-pixel TDCs.

This report presents a proof-of-concept for a sensor measuring the ionic concentrations in sweat using cyclic voltammetry. Development is focused on feasibility of the sensor. Theoretical evaluations of voltammetry as a working principle and its physical and electrochemical foundations are guiding principles of the design. The sensor is then implemented using commercial components. Experiments show that the sensor has good sensitivity and linearity for single ions in the physiological range. For the measurement of multiple ions the voltammogram is characterized in-depth. A matrix of different ionic fluids with multiple ions is prepared and two independent parameters for the concentration of two ions (sodium and potassium) are found, proving the concept of the sensor for more complex solutions. The usability of the sensor is verified using a sweat sample. Different influencing factors are researched and their impact characterized. Varying electrode materials are evaluated considering durability and sensitivity. Conclusions are drawn and an outlook for future research on this type of sensor is given. The concept of the sensor is proven to work within certain limitations.

Real-time (RT) systems are widespread over different industries, e.g., healthcare, robotics, manufacturing, machine vision, etc. These systems consist of a hardware and software part that execute an RT application. These systems require a bounded and predictable time response on incoming events and execute all input and output (IO) tasks simultaneously. To ensure this concurrent behavior, the different IO devices are synchronized to achieve a common time notion. The implementation of time notion in systems can differ and therefore
various types of synchronization exist, e.g. in-band and out-of-band. In-band synchronization utilizes the general communication channel to distribute time information, contrary to out-of-band synchronization which uses an external wire to transfer the time signals. As the in-band type implies the synchronization transactions flow together with the general traffic, the synchronization mechanisms are often implemented in the interconnect protocol. This integration limits the choice for a feasible synchronization protocol as this choice is dependent on that of the interconnect due to restricting communication requirements of RT applications. Current synchronization protocols are often limited to sub-microsecond (μs) latency variations and/or partially rely on an out-of-band principle. The goal of this master thesis is to find a solution that is able to achieve in-band synchronization with nanosecond (ns) range jitter. The proposed design is optimized towards nanosecond-scale jitter, by taking implementation challenges of Precision Time Protocol (PTP) into account, and is separate from the choice of interconnect. PTP is an existing synchronization mechanism which retrieves the differences in time notion (offsets) across multiple devices while accounting for transmission latency to each individual device. The implementation of PTP can result in limited performance in terms of jitter. The design focuses on minimizing this jitter with increasing the accuracy and robustness of the PTP synchronization algorithm by improving the precision of timestamps and filtering the calculated offsets for outliers. The synchronization mechanism was evaluated through simulation and validation in hardware. This master thesis presents a Proof of Concept (PoC) that can be implemented into real-world RT systems. It consists of two devices synchronizing to one reference device using the proposed synchronization mechanism. The PoC achieves down to 7 ns jitter, which was not reached by feasible existing in-band synchronization yet.

Organs-on-Chips (OoCs) are micro-engineered devices in which small samples of human-organ tissue are cultured on the substrate. A chip is designed in such a way that it can emulate the in-vivo physiological environment for disease modeling and drug screening. OoC technology can be incorporated into the drug development process from early drug discovery to pre-clinical drug screening. This cutting-edge technology can reduce the use of laboratory animals as animal models do not accurately recapitulate the in-vivo physiology and pathology of the human body. Current microfabrication techniques integrate features like microfluidics and micropumps into OoC devices to provide the necessary perfusion. Additionally, it is possible to monitor the behavior of cells or tissue by incorporating sensors into the platform.
Cardiovascular diseases are a leading cause of death worldwide, which calls for an ideal in-vitro screening model for cardiotoxicity. The MUSbit™ device, an OoC developed by Bi/ond, incorporates a 3D muscle microtissue anchored to two pillars designed to align the tissue. The device consists of a microfluidic channel to offer the necessary perfusion to mimic the blood flow through the heart. Bi/ond aims to electrically pace the cardiovascular bundle via the two pillars and record the electrical activity of the cardiac cells. This is achieved by combining an electrode and the pillar. Thus, a 3D electrode in integrated into the platform. Compared to 2-D microelectrode arrays (MEAs), 3D electrodes have a larger surface area, lowering the electrode impedance and increasing the signal-to-noise ratio (SNR).
The existing method of Bi/ond incorporates the electrode underneath the pillar via a cavity ( also known as the basement) in silicon fabricated using Deep Reactive Ion Etching (DRIE). This thesis focused on combining the electrode underneath the pillar by optimizing the critical steps in the fabrication process. The basement provides a form of adhesion for the pillars towards the later stages of the process. Due to the limitations concerning the step coverage of the different layers deposited over the current profile of the cavity, the design was modified. In this project, two main goals were defined and achieved. Firstly, the basement design was optimized by wet etching the silicon using potassium hydroxide (KOH) to obtain a cavity with a slanted sidewall. The photolithography on the layers and the step coverage of the deposited layers on the cavity were investigated. Experiments were performed to observe the effect of the modified basement design on the pillars (without the electrode). Secondly, the feasibility of integrating the electrode underneath the pillar without a basement was assessed. The photomask of the essential layers (except the metal) was designed accordingly. Finally, the influence of the alternative designs on the pillars was tested to verify their viability. Both approaches showed that it is practical to implement the techniques which can be compatible with the process of Bi/ond. The several microfabrication tests presented in this work set a foundation to incorporate the electrodes into the platform, making ground for future studies.

This thesis presents a temperature-dependent reference control method to compensate for the temperature effect on CMOS image sensors from -40◦C to 125◦C. Recently, machine vision has been one of the most important applications for CMOS image sensors. However, the working environment and operation might generate large temperature variations and degrades the performance of CMOS image sensors. In this work, the temperature dependency of the distortion generated in the analog front-end is investigated. A mathematical model has been built to describe the relationship to its temperature dependency. Besides, a temperaturedependent reference control method with 16 different slopes is proposed. This method can control the working condition of the transistors and compensate for the change by reference current or voltage. Besides, the slope design can cover the external noise or mismatch and fulfill the compensation. Finally, it can compensate the signal distortion and prevent the settling error which could generate FPN while maintaining the noise performance. A SPICE simulation and post-simulation are performed to confirm the results of the design.

Metal oxide nanoparticle gas sensors showpromise due to their high sensitivity towards a wide range of gases, low costs, and low complexity. Particle sizes at nanometers offer a high surface-to-volume ratio which provides more areas on the surface where reactions can occur. This work presents the application of spark ablated nanoparticles on chemiresistors and chemFETs, and does a study on whether spark ablated nanoparticles are a viable alternative to nanoparticles generated using other methods. The focus in this thesis is on pure metal oxide nanoparticles without any addition of dopants or decorations. Devices are fabricated with different interdigitated electrode dimensions. The effect of electrode width and gap size on the gas response is studied by comparing the sensing performance of the devices. In this work, a very high sensitivity of 1300% is achieved towards 35% relative humidity using a 1x1 mm device with SnO2 nanoparticles. Towards 20 ppm of ethanol, sensitivities of 39% and 67% are achieved using 1x1 mm and 4x1 mm devices with SnO2 nanoparticles respectively, which implies that spark ablated nanoparticles could be a viable alternative to particles generated using other methods. The full recovery time after gas exposure seems to be very long and takes around an hour for some devices at 200 °C. Possible solutions for this are setting a higher temperature (not possible with the used setup), or reducing the particle size (∼20 nm in this study). The electrode finger widths and gap sizes are varied between 2-15 μm for each device. However, no correlation is found between electrode geometry and gas response within this range, suggesting that differences in gas response between devices likely stem from nanoparticle layer quality differences.

Today’s cars are undergoing the greatest transformation the industry has seen. Power MOSFETs play a crucial role in making electronics more energy efficient by driving down switching losses and Rdson using a combination of next-generation trench technology and ultra-thin dies. Power MOSFET dies are becoming larger ( > 5 X 5 mm ) and thinner ( < 50 μm ) to meet the high performance lifetime requirements of the automotive industry. The high aspect ratio and the new chip designs with trench technology offer challenges for assembly, packaging and testing.

The majority of the research performed in the past, aimed to reduce the risk of die crack by improving equipment and process strategies in back-end semiconductor processing. This thesis study aims at improving die
strength from a front-end approach (device fabrication process) by making dies stronger to stress from die frontside. New chip designs are presented with new metal layer layouts for improved stress distribution. Materials like polyimide are investigated as new die top material for mechanical strengthening of die frontside. Key factors which influence die strength like trench-metal interaction, wafer stress and warpage are also analyzed in this thesis report.

In this study, ultra-thin power MOSFET dies are realised on 100 mm diameter silicon wafers with dimensions of 6 X 3 X 0.050 mm. These dies are mechanical equivalent in design, robustness to commercial trench power MOSFETs. The processed wafers are grinded from the backside to realise 50 μm thin wafers which are then sawned to obtain singulated dies. The strength of the dies are characterized by three-point bending tests and analyzed using probability plots for weibull distribution.

Particle sorting is an important step in many biological and biomedical techniques. One sorting technique that has received a lot of attention is based on acoustophoresis. Manipulating cells with acoustic forces allows for a sorting method based on physical properties in a non-invasive, label-free, and biocompatible manner. To date, acoustic sorting devices have been developed using either an interdigitated transducer (IDT) or a lead zirconate titanate (PZT) as an acoustic source. IDTs generate surface acoustic waves (SAW) that can sort particles with high precision, however only low throughput is possible. PZT, on the other hand, generates bulk acoustic waves (BAW) that allows for a simple device architecture with high throughput. Nevertheless, the current research done on BAW sorting devices also shows the disadvantage of frequency restrictions.

An attractive alternative to PZT in acoustic sorting devices that has yet to be researched, are the capacitive Micromachined Ultrasonic Transducers (CMUT). CMUTs are well-known for their broad bandwidth, batch production and the possibility for complex designs and integration with electronic circuits.
In this work, we present proof-of-concept devices to examine that CMUTs can be used as an acoustic source for particle sorting. Two different acoustic-microfluidic device interfaces were considered, namely the sidewall and the top area of the CMUT. Additionally, the presence of an acoustic pressure within the silicon substrate of the CMUT's die was investigated.

Experiments show that CMUTs generate an acoustic pressure within the silicon substrate of the CMUT's die. This acoustic pressure increased 6.4 times when a phase alignment approach was used compared to when no phase alignment approach was used. Following these findings, acoustic-based sorting devices were assembled to perform particle alignment experiments. It was shown that continuous particle sorting could be demonstrated efficiently for both interfaces by using a pressure field based on standing waves. Additionally, structures integrated into the microfluidic devices, such as a vacuum horn, have the potential to amplify the acoustic signal. These findings indicate that CMUT-based microfluidic devices could provide a promising method for sheathless particle sorting.