Heterojunction silicon with intrinsic thin layer (HIT) solar cells that combine advanced thin-film hydrogenated amorphous silicon (a-Si:H) and crystalline silicon (c-Si) technologies are promising because of the high performance at low cost. Due to the low conductivity of a-Si:H,
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Heterojunction silicon with intrinsic thin layer (HIT) solar cells that combine advanced thin-film hydrogenated amorphous silicon (a-Si:H) and crystalline silicon (c-Si) technologies are promising because of the high performance at low cost. Due to the low conductivity of a-Si:H, indium tin oxide (ITO) needs to be used as a front contact layer on top of a-Si:H in order to collect photogenerated currents. The thin a-Si:H layer requires the ITO deposition to be soft so that the passivation is maintained after deposition. Otherwise, the passivation degradation resulting from ITO deposition should be recovered by some post processing. In this contribution, we investigate how the power density and the temperature during ITO deposition as well as post annealing influence the passivation quality of HIT solar cells as characterised by the open-circuit voltage (Voc) and minority carrier lifetime. Firstly, ITO sputtering with lower power density can reduce the degradation of the passivation quality after ITO deposition. Secondly, we have investigated the simultaneous annealing during ITO deposition at elevated temperature. On one hand, simultaneous annealing can recover some of the degradation resulting from sputtering. On the other hand, there is a temperature threshold above which degradation of the passivation is observed, probably by hydrogen effusion. Thirdly, we observe that post annealing can fully recover the degradation resulting from ITO sputtering at room temperature (RT).@en