Power MOSFET dies in the automotive industry are becoming larger (>5 × 5 mm) and thinner (<50 µm) to meet high-performance and lifetime requirements. Ensuring the mechanical robustness of these large ultrathin chips is crucial for reliable electronic devices and high-throughput packaging processes. The high aspect ratio and advanced chip designs incorporating trench technology present significant challenges in semiconductor assembly, packaging, and testing. This paper introduces an experimental front-end strategy aimed at strengthening the front side (FS) of large ultrathin dies using various die-top systems. Industry-equivalent 50 µm thick dummy power MOSFET dies were fabricated to evaluate the efficacy of different chip designs and materials, such as polyimide (PI), in mitigating fracture risks. Fabrication-induced stresses and warpage in the device layers were measured using a thin-film stress measurement tool. Additionally, the FS strength of the ultrathin dies was assessed using the three-point bending method, with the resulting data analyzed via two-parameter Weibull distribution plots. Results demonstrated that the deposition of 5 µm PI on the nitride die topside significantly increased die strength from 339 MPa to 760 MPa, with 5 µm PI proving more effective for die strengthening than 10 µm. The interaction between the metal-trench layer and the die was found to be critical to the robustness of ultrathin dies, influenced by the pattern and layout of the trenches. Die-top metallization designs, such as meandering patterns, showed promising improvements in die strength compared to standard designs. A proposed chip layout aims to maximize PI coverage for clip-bonded products on the die topside, leveraging its strengthening effect. The study also demonstrated that dummy reference chips can facilitate rapid and straightforward evaluation of extensive design experiments to identify robust chip designs.@en

Driven by the increasing demand for high-power systems, ceramic substrates have received more attention for handling higher power density. Warpage in active metal brazed (AMB) ceramic substrate becomes a critical issue as it can deteriorate the reliability performance. This study comprises three phases, including investigation of the cause of the warpage, validation of the proposed model, and optimization for effective warpage management. At first, the coefficient of thermal expansion (CTE) and yield strength of the copper (Cu) layer in AMB were characterized and adopted in a two-dimensional (2D) finite element model. The evolution of simulated strain and moments revealed the cause of the warpage during the manufacturing processes. Furthermore, the 2D model was extended to a three-dimensional (3D) model. The finite element method (FEM) and experiments were conducted on different heat treatment conditions for 3D model validation. The validated 3D model was applied to carry out a design of experiments (DoEs) for design optimization to reduce the warpage. Consequently, the factor analysis in DoEs was demonstrated by different pattern designs using subtractive milling techniques.@en