We report an avalanche-mode light-emitting transistor (AMLET) in silicon (Si), based on a lateral bipolar junction, which emits light near 760 nm optical wavelength with a record low bandwidth of 38 nm. The AMLET, designed in a CMOS-compatible silicon-on-insulator (SOI) photonics platform, is optically confined within a 0.21 ∼\μ m thick SOI layer, which forms a Fabry-Pérot (FP) resonator perpendicular to the Si surface. Light is emitted from the reverse biased emitter-base junction via phonon-assisted hot carrier recombination and, additionally, minority carriers are injected via the forward-biased Base-Collector junction. The combination of injection from collector terminal through a narrow base and FP optical resonance, yields a high optical power efficiency of 4.3\× 10-6 at V BC=0.8 V and V EB=10 V. Our work opens new possibilities in spectral-engineering of Si light-emitters, which could boost performance of all-Si optical interconnects and sensors.

The CMOS silicon avalanche-mode light-emitting diode (AMLED) has emerged as a potential light source for monolithic optical interconnects. Earlier we presented a superjunction light-emitting diode (SJLED) that offers a higher electroluminescent intensity compared to a conventional AMLED because of its more uniform field distribution. However, for reducing power consumption low-voltage ( \leq 15\text{V} ) SJLEDs are desired, not explored before. In this work we present a TCAD simulation feasibility study of the low-voltage SJLED for various doping concentrations and device dimensions. The results show that for obtaining a constant field, approximately a tenfold more aggressive charge balance condition in the SJLED is estimated than traditionally reported. This is important for establishing a guideline to realize optimized RESURF and SJLEDs in the ever-shrinking advanced CMOS nodes.