The CMOS silicon avalanche-mode light-emitting diode (AMLED) has emerged as a potential light source for monolithic optical interconnects. Earlier we presented a superjunction light-emitting diode (SJLED) that offers a higher electroluminescent intensity compared to a conventional AMLED because of its more uniform field distribution. However, for reducing power consumption low-voltage ( \leq 15\text{V} ) SJLEDs are desired, not explored before. In this work we present a TCAD simulation feasibility study of the low-voltage SJLED for various doping concentrations and device dimensions. The results show that for obtaining a constant field, approximately a tenfold more aggressive charge balance condition in the SJLED is estimated than traditionally reported. This is important for establishing a guideline to realize optimized RESURF and SJLEDs in the ever-shrinking advanced CMOS nodes.