MS

M.S.K. Seyab

18 records found

Bias temperature instability analysis of FinFET based SRAM cells

Variability and reliability analyses in SRAM decoder

Bias temperature instability analysis in SRAM decoder

Bias temperature instability analysis, monitoring and mitigation for nano-scaled circuits
Doctoral thesis (2013) - M.S.K. Seyab (author)

BTI Impacts on logical gates in nano-scale CMOS technology

Analyzing combined impacts of parameter variations and BTI in nano-scale logical gates

Incorporating Parameter Variations in BTI Impact on Nano-scale Logical Gates Analysis

Impact of partial resistive defects and bias temperature instability on SRAM decoder reliablity

Comparative BTI analysis in nano-scale circuits lifetime

ReverseAge: an Online NBTI Combating Technique Using Time Borrowing

NBTI-Aware Nanoscaled Circuit Delay Assessment and Mitigation

NBTI Monitoring and Design for Reliability in Nanoscale Circuits

Modeling and Mitigating NBTI in Nanoscale Circuits

Temperature dependence of NBTI induced delay

Temperature impact on NBTI modeling in the framework of technology scaling

NBTI modeling in the framework of temperature variation

Trends and challenges of SRAM reliability in the nano-scale era

CMOS scaling impacts on reliability, what do we understand?