In recent years, significant research and adoption of periodic variable switching frequency PWM (P-VSFPWM) have been observed in AC/DC voltage source converters (VSCs). This technique aims to reduce ripple in AC inductor current and DC capacitor voltage, suppress injected current harmonic amplitudes for EMC compliance, and minimize switching losses. However, the presence of overlapped harmonic spectra from different switching harmonic bands can lead to heightened harmonic magnitudes due to the wide frequency variation, necessitating additional filtering measures. Surprisingly, there is notable absence of harmonic spectra analysis under P-VSFPWM, despite the growing concern over supra-harmonics (2-150 kHz) emission injected to the grid from the electric vehicle (EV) chargers. To address this gap, this paper proposes the interleaved P-VSFPWM to mitigate harmonics overlap without deviating from the intended purpose of P-VSFPWM. A fast-acquisition supra-harmonics model under arbitrary P-VSFPWM has been proposed based on vectorization, facilitating the subsequent filter design process. Furthermore, this study identifies the optimal P-VSFPWM profile with minimal required filtering inductance based on the spectra analysis. These findings are verified by PLECS simulations and experimental results.

High efficiency can be achieved in grid-connected converters by implementing a zero-voltage switching mechanism, such as the integrated triangular current mode (iTCM) modulation, which reduces the switching losses in the semiconductors. The iTCM can be readily adapted to a three-phase three-wire voltage-source converter (VSC) with the help of virtual ground (VG), which decouples the operation of three-phase switching cells. However, conventional methods of VG have all the zero-sequence currents flowing through the dc-link capacitors, resulting in an increase in the rms current, hence, extra loss for those passive components. This article, thus, introduces a capacitor-split VG topology that can relieve this issue by excluding the dc-link capacitors from the circulating path of the main zero-sequence currents, helping to reduce current stress for the dc-link capacitors. This topology is characterized by its filter capacitors being split into two halves and connected to the top and the bottom dc rails, respectively. Herein, the working principles of the proposed iTCM-operated three-phase three-wire VSC are comprehensively explained, and a detailed design guideline for the LC branch and LCL filter is offered. Analytical models for component stresses and the reverse current waveform have been developed and corroborated through PLECS simulations. A 3-kW, heatsink-less VSC system was constructed and tested, confirming both the system's effective functionality and the enhanced power efficiency of the proposed capacitor-split VG connection. Therein, the studied system demonstrated a significant efficiency improvement, ranging from 0.51% to 2% across the entire operating power spectrum, as compared to the conventional VG connection in iTCM-operated VSCs.

The sinusoidal Triangular-Current-Mode (S-TCM) method has been proposed in the AC/DC power-factor-correction (PFC) converter to achieve the zero-voltage-switching (ZVS) which can lead to both, high efficiency operation and a high power density design. Nevertheless, the necessary wide range variation of the sinusoidal switching frequency profile imposed by the S-TCM results in a larger generated voltage harmonic peak due to the overlapping between different order carrier-frequency harmonics. In this work, the S-TCM is used in the interleaved 2-level converter to minimize the undesirable effects of such overlapped voltage harmonics while maintaining ZVS via S-TCM. Meanwhile, the necessity of coupled inductors (CIs) in the interleaved topology is avoided by implementing the S-TCM. Both simulation and experimental tests conducted in a 3.3 kW interleaved 2-level converter system are used to verify the study.

Reinforcement of the legacy grid infrastructure will be very costly and thereby unrealistic. Consequently, weak grid connection of electric vehicle (EV) chargers will sooner or later be the case. It may however bring instability issues since the EV chargers that can work well in strong grid conditions usually do not fit the weak grid conditions. Aiming at design guidelines, this digest analyzes the influence of the charger's design on the stability of the grid connection. Simulations and experiments are carried out to verify the analysis results.

Variable switching frequency PWM (VSFPWM) modulation can be advantageously implemented in industrial applications, such as renewable energy, motor drives, and uninterrupted power supply (UPS) systems, to reduce the injected current harmonic amplitudes, to suppress audible noise, and to improve semiconductor power efficiency. In this article, the usage of periodic VSFPWM methods in a voltage source converter (VSC) is proposed, analyzed, and benchmarked in terms of harmonic spectrum spreading, following the IEEE-519 current harmonic standard for the connection to the distribution grid. Particular attention is paid to the influence of VSFPWM on the ac filter design. First, the analytical model of the voltage harmonic spectrum generated by a three-phase three-wire two-level VSC implementing several periodic VSFPWM methods is derived. Subsequently, a design guideline for the commonly used LCL filter in the grid-tied VSC application is proposed, which minimizes the size requirement of the necessary components. The voltage spectrum models of the proposed VSFPWM method and the optimal switching profiles are verified by MATLAB/Simulink simulations and a 5-kW three-phase two-level VSC hardware demonstrator. The study shows that the ac filter power density for the studied VSFPWM methods can be greatly increased when compared with the conventional and widely employed constant switching frequency continuous PWM strategies.

This paper presents the study of a 100kW electric vehicle (EV) fast charger based on a 12-pulse rectifier cascaded with two buck-type DC-DC converters. The proposed circuit operates with a triangular current shaping method which considerably improves the current harmonics performance of the system. The studied circuit is particularly suited for high power battery charging, being relatively simple to operate, requiring a low active semiconductor count (only two active switches), and because it employs circuit technologies well-established in the high power market. Above all, this EV fast charger meets the requirements of isolation, high efficiency, high output voltage and good power quality (low THD and unity power factor). This paper describes in detail the analytical modeling of the studied circuit, including the current harmonic input filter design which meets the grid standard requirement, and the loss modeling of the semiconductors and passive elements. The modeling and simulation results of the proposed 100 kW system are presented and analyzed.

This paper proposes a solution to the circuit topology of heavy-duty electric vehicle (HDEV) chargers. In light of the original hybrid rectifier, a new unidirectional Input-Parallel-Output-Series (IPOS) three-phase hybrid rectifier is proposed and analyzed. The IPOS topology is advantageous at ultra-high power rating to interface the next-generation HDEV batteries which require a high and wide output voltage range of 800~1500 V with available 600/1200V commercial semiconductors. Moreover, the proposed topology is efficient, cost-effective, and scalable with the grid input current harmonic components in compliance with the IEEE-519 standard. The benefits of the IPOS topology are supported by circuit derivation, control strategy, analytical modelling, simulation, and experimental verification.

A three-phase buck-type rectifier features a step-down ac-dc conversion function, which is considered as a prominent solution for electric vehicle chargers and telecommunication systems integrated to the grid above 380 V line to line. However, traditional solutions for those applications employ cascaded architectures with an ac-dc boost-type stage and a dc-dc buck-type stage, which may suffer from high switching losses and large dc-link capacitor volume. To relieve this issue, a straightforward carrier-based two-phase-clamped discontinuous pulsewidth modulation (DPWM) strategy with generalized zero-sequence voltage injection is proposed in this article for the commonly employed cascaded circuit. This method can stop the switching actions in the front-end stage during two-third of the grid period, which can yield to the best switching loss reduction. The operations of the front- and back-end converter stages become highly coupled to each other, which reduces the size requirement of the capacitor in the dc link. Therefore, the equivalent circuit behaves as a quasi-two-stage buck-type rectifier allowing an enhancement of the system power density by improving power conversion efficiency and by reducing the volume of passive components and heat sink. The proposed carrier-based two-phase-clamped DPWM strategy is described, analyzed, validated, and compared with different pulsewidth modulation methods on PLECS-based simulation and a 5-kW prototype.

DC links with back to back voltage source converters are usually built alongside the existing medium voltage ac distribution grids for infrastructure reinforcement. The distribution network operators need to run multiple of such parallel ac and dc links between two substations at optimal efficiency. This article shows that the active power steering capability of the dc link can be used to dynamically vary the share of power flow in the ac link such that the system operating efficiency is maximized for varying power demand, grid voltage, dc-link voltage, converter efficiency, link length, and conductor area. The algorithm developed based on the derived exact and estimated solution for this parallel ac-dc link power sharing ratio is proved through simulations on a 10 kV, 30 MVA system. The concept is validated using experiments on a scale-down lab model. Using case-study with adapted measured substation data of hourly average power demand profile for one year, it is shown that annual energy saving potential in the range of 8-92 MWh can be achieved with varying link length between 10-20 km for 5-20 kV grid voltage and 185-630 mm$^2$ conductor area if the proposed optimal power flow control is used.

There is an increasing focus on integrating flexible dc links for bulk power routing in medium voltage distribution grids. In such applications, the ac-dc Modular Multilevel Converter (MMC) devised for medium voltage and high-power ratings can be an interesting choice. This paper highlights some less explored design trade-offs arising due to the limitation on N in relation to modulation frequency and arm inductance. Specifically, the study intends to describe the interdependent influence of each degree of freedom on several aspects such as capacitor voltage balancing, circulating currents and harmonic performance. Finally, the importance of considering interhar-monies in the performance assessment of the MMC instead of the conventional interpretation of distortion calculation is highlighted.