We consider the design of Wireless Power Transfer (WPT) systems based on inductive links and focus on recent works where the whole WPT system (i.e. both energy transmitter and energy receiver) is designed as an isolated resonant class-E DC-DC converter characterized by a loosely-coupled transformer. The aim of this work is to compare the classic WPT design approach with a novel one, which allows achieving the same performance with a significant reduction in the number of reactive components of the circuit, with beneficial effects in terms of system complexity, size, and cost. We will also show that such a reduction in the number of reactive components leads to improved performance robustness to variations in the inductive link coupling factor.@en

In this paper, the design of a wireless power transfer system (WPT) targeting biomedical implants is considered. The novelty of the approach is to propose a co-design of the transmitter and receiver side based on the design of class-E isolated DC-DC converters. The solution, along with the simple introduction of a shunt regulator at the receiver, allows us to solve the problem of ensuring optimal efficiency in the WPT link. In conventional solutions, in order to cope with coupling factor and load variations, information from the receiver is needed, which is usually relayed back onto the transmitter by means of telemetry. With the proposed approach, a very simple minimum power point tracking (mPPT) algorithm can be used to maximize the WPT efficiency based on the information already available at the transmitter side. This reduces the complexity of the circuitry of the implant and thereby its power overhead and possibly its size, both being crucial constraints of a biomedical implant.

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Wireless biosensors are playing a pivotal role in health monitoring, disease detection and management. The development of wireless biosensor nodes and networks strongly relies on the design of novel low-power, low-cost and flexible CMOS sensor readouts. This brief presents a CMOS potentiostat that integrates a control amplifier, a dual-slope ADC and a wireless unit on the same chip. It implements a novel time-based readout scheme, whereby the counter of the dual-slope ADC is moved to the receiver and the sensor current is encoded in the timing between two wireless pulses transmitted via pulse-harmonic modulation across an inductive link. Measured results show that the potentiostat chip can resolve a minimum input current of 10pA at a sampling frequency of 125 Hz and a power consumption of 12 μW .

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The total economic cost of neurological disorders exceeds £100 billion per annum in the United Kingdom alone, yet pharmaceutical companies continue to cut investments due to failed clinical studies and risk [1]. These challenges motivate an alternative to solely pharmacological treatments. The emerging field of bioelectronics suggests a novel alternative to pharmaceutical intervention that uses electronic hardware to directly stimulate the nervous system with physiologically inspired electrical signals [2]. Given the processing capability of electronics and precise targeting of electrodes, the potential advantages of bioelectronics include specificity in the time, method, and location of treatment, with the ability to iteratively refine and update therapy algorithms in software [3]. A primary disadvantage of the current systems is invasiveness due to surgical implantation of the device. © 2009-2012 IEEE.@en

Kilohertz frequency alternating current (KHFAC) stimulation can induce fast-acting, reversible and repeatable nerve conduction block, and is a candidate therapeutic method for diseases caused by undesired neural activities, such as urinary retention. In this paper, we first show that ultra-high frequency (UHF) current pulses can also lead to successful nerve conduction block, based on simulation results using the McIntyre-Richardson-Grill (MRG) model. This model describes a myelinated axon of mammalian animals. Second, we present a prototype of a power efficient neural stimulator using UHF current pulses with active charge balancing (CB). The stimulator is built using off-the-shelf components and can be battery-powered. It uses a DC-DC boost converter without a big filtering capacitor, for generating UHF current pulses. The power efficiency of the complete system is up to 98% when testing with an equivalent circuit model of electrode tissue interface (ETI). Safety measurement results show that the electrode offset voltage can be as high as 1.3 V without charge balancing, in in vitro experiments with titanium electrodes in a phosphate buffered saline (PBS) solution. However, this electrode offset voltage can be successfully lowered to less than 42.5 mV, by means of negative-feedback duty cycle control of the H-bridge clock. The active CB is adopted for KHFAC stimulation for the first time.

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The patch clamp has been widely considered the gold standard to measure intracellular ionic activity of single cells [1]. However, patch clamping is a laborious method and suffers from low throughput. To mitigate the disadvantages of patch clamping, planar patch clamp (PPC) chips with higher throughput have been recently introduced [2-3]. Yet those microfluidic chips do not allow to concurrently monitor the extracellular and the intracellular activity of the cells. Understanding of the complex cellular network activity and electrochemical processes, requires correlation between local field potentials (LFPs) of a population of cells and action potentials (APs) of single cells. This abstract presents a novel CMOS compatible microfluidic system that integrates flip-tip planar patch clamps (FTPPCs) and microelectrode arrays (MEAs) on the same wafer, for invitro extra- and intra-cellular recordings of electrical activity of cardiac cells. The device is fabricated using conventional wafer front- and back-side photolithography. The fabrication process leverages anisotropic wet etching selectivity of potassium hydroxide (KOH) and deep reactive ion etching (DRIE) to pattern FTPPCs. Before DRIE process, plasma-enhanced chemical vapor deposition (PECVD) of silicon dioxide (SiO2) is applied as passivation layer. After DRIE process, a metallization step is performed by sputtering titanium nitride (TiN) on patterned structures. As the final step, SiO2 is removed and backside DRIE is used to open apertures approximately with 2 µm diameter. The FTPPCs are intended to have a tip in 20 µm depth after KOH etching, and a spacing of 200 µm to ensure that mechanical stability of the device after DRIE. The planar MEAs are then patterned on the front side with 50 µm diameter and a pitch of 200 µm. A PDMS culture chamber is attached the front-side of the wafer, while a PDMS microfluidic channel is constructed on the back-side. By applying suction through the microfluidic channels, the cells are trapped in the FTPPC apertures. Potentiostatic measurements are used to record the ionic activity of the cells intracellularly, while low-noise instrumentation amplifiers are used in combination with the MEAs, to concurrently measure LPFs. Co-integration of PPC and MEAs on the same wafer can provide valuable insight in the correlation between sing @en

The original paper entitled "Practical Inductive Link Design for Biomedical Wireless Power Transfer: A Tutorial" [1], aimed to provide an accessible review and guide, describing the necessary steps for designing effective biomedical inductive links, without the need for FEM Software. While the majority of the information in this paper is accurate and applicable, some errors in formulas have been brought to the attention of the authors, which could generate erroneous results if used in calculations. The aim of this paper is to highlight and correct these errors. It should be noted that the accompanying software for performing these calculations has also been corrected where necessary, in line with the corrections presented here [2]. The errors largely relate to the equations presented throughout, and are listed below: First, [1, Eq. (2)], defining an approximation for Nagaoka's coefficient, contains erroneous squares and is missing a term in the fraction of the large denominator. The correct form is presented below: Second, [1, Eq. (14)] considers the ac losses of a Litz-wire coil. The original form contains errors of coefficients and signs. The correct formulation is given as follows: (Formula presented). Third, [1, Eq. (17)] is missing a square. The correct form is as follows: Fourth, [1, Eq. (26)], that defines ang, is missing a cos a from the numerator of the top fraction under the square root. The correct form is given below: Finally, the caption of [1, Fig. 17] is in error; it currently refers to coupling coefficient, while it shows Q-factor. It should read as follows: "Changing Q-factor as winding pitch is modified, with respect to frequency.

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Active implantable medical devices have been developed for diagnosis, monitoring and treatment of large variety of neural disorders. Since the mechanical properties of these devices need to be matched to the tissue, soft materials, such as polymers are often preferred as a substrate. 1 Parylene is a good candidate, as it is highly biocompatible and it can be deposited/etched using standard Integrated Circuit (IC) fabrication methods/processes. Further, the implantable devices should be smart, a goal that can be accomplished by including ICs. These ICs, often come in the form of additional pre-packaged components that are assembled on the implant in a heterogenous process. Such a hybrid integration, however, does not allow for size minimization, which is so critical in these applications, as otherwise the implants can cause severe damage to the tissue. On the other hand, it is essential that all components are properly packaged to prevent early failure due to moisture penetration. 2 In this work we use a previously developed semi-flexible platform technology based on a Parylene substrate and Pt metallization, which allows integration of electronic components with a flexible substrate in a monolithic process. 3 We use an IC fabrication-based platform that allows for the fabrication of several rigid regions including Application-Specific Integrated Circuits (ASICs) and other components connected to each other by means of flexible interconnects. According to Fig. 1, we aim to add more functionality to this technology and thereby extend it to a platform for a variety of medical applications. An example of such functionality is integrating Light Emitting …@en

Wireless data telemetry for implantable medical devices (IMDs) has, in general, been limited to a few Mbps, and used for applications such as transmitting recordings from an implanted monitoring device, or uploading commands to an implanted stimulator. However, modern neural interfaces need to record high resolution potentials from hundreds of neurons; this requires much higher data rates. While fast wireless communication is possible using existing standards such as WiFi, power consumption demands are far too high for IMDs. Short range inductive link based telemetry, in particular impulse-based systems such as pulse-harmonic modulation (PHM), have demonstrated transfer speeds of up to 20 Mbps with a small power budget. However, these systems require complex and precise circuits, making them potentially susceptible to inter-symbol-interference. This work presents a new method named Short-range Quality-factor Modulation (SQuirM), which retains the low power consumption and high data rate of PHM, while improving the resilience of the system and simplifying the circuit design. Transmitter and receiver circuits were fabricated using 0.35 μm CMOS. The circuits were capable of reliably transceiving data at speeds of up to 50.4 Mbps, with a BER of < 4.5 × 10^-10 , and a transmitter energy consumption of 8.11 pJ/b.

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Short-range, low-power, high data-rate telemetry is an increasingly desirable feature for implantable medical devices (IMDs), and is commonly implemented using an inductive link. Pulse Harmonic Modulation (PHM) provides the desired high data rates and low power consumption, but requires precise pulse timing. This paper presents a modification of PHM, Single-Pulse Harmonic Modulation (SPHM), which offers reduced power consumption and lower implementation complexity. In order to test the SPHM concept, transmitter and receiver circuits were designed in 0.35μm CMOS and simulated. The simulated results suggest that the circuits can transceive data at 50Mb/s, consuming 1.49pJ/b and 2.59pJ/b at the transmitter and receiver respectively, from a 1.2V supply.

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Wireless sensing systems are becoming popular in a range of applications, particularly in the case of biomedical circuits and food monitoring systems. A typical wireless sensing system, however, may require considerable complexity to perform the necessary analog to digital conversion and subsequent wireless transmission. Alternatively, in the case of inductive link based systems, large, manually operated impedance analyzers are required. Based on a detailed analysis of the link impedance, this paper proposes a simple method for wireless capacitive sensing through an inductive link that uses a self-oscillator and a frequency counter. The method enables changes in capacitance to be sensed and wirelessly transmitted simultaneously. In order to test the effectiveness of the method, a self-oscillating circuit was designed and fabricated in 0.18 &#x03BC;m CMOS, and combined with an on-chip humidity sensing capacitor. The system was tested in a humidity chamber across a range of 20-90&#x0025;rh. Measured results from the system demonstrate that capacitive changes as small as 28 fF, translating to &lt;2&#x0025;rh, can be resolved, with a power consumption of 1.44 mW.

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There is growing demand for circuits that can provide ever greater performance from a minimal power budget. Example applications include wireless sensor nodes, mobile devices, and biomedical implants. High speed clock circuits are an integral part of such systems, playing roles such as providing digital processor clocks, or generating wireless carrier signals; this clock generation can often take a large part of a system's power budget. Common techniques to reduce power consumption generally involve reducing the clock speed, and/or complex designs using a large circuit area. This paper proposes an alternative method of clock generation based on driving a high-Q resonator with a periodic chain of impulses. In this way, power consumption is reduced when compared to traditional resonator based designs; this power reduction comes at the cost of increased period jitter. A circuit was designed and laid out in 0.18μm CMOS, and was simulated in order to test the technique. Simulation results suggest that the circuit can achieve a FoM of 4.89GHz/mW, with a peak period jitter of 10.2ps at 2.015GHz, using a model resonator with a Q-factor of 126.@en

Point-of-care systems for the detection of infectious diseases are in great demand especially in developing countries. Lateral flow immunoassays are considered ideal biosensors for point-of-care diagnostics due to their numerous advantages. However, to quantify their results a low power, robust electronic reader is needed. A low power CMOS image sensor is presented that can be used in quantitative lateral flow immunoassay readers. It uses a single low power processing capacitive transimpedance amplifier architecture which includes noise cancellation. A chip containing 4 &#x00D7; 64 pixels was fabricated in CMOS 0.35-&#x03BC;m technology. With uniform illumination at 525 nm and 67 frames per second the chip has 1.9 mVrms total output referred noise and a total power consumption of 21 &#x03BC;W. In tests with lateral flow immunoassays the chip detected concentrations of influenza A nucleoprotein from 0.5 ng/mL to 200 ng/mL.

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Point-of-care (PoC) diagnostics rely on the design of low-power and miniaturized readout units that can offer rapid and accurate test results, replacing the need for specialized equipment. CMOS technology can be exploited in order to design complex systems while achieving high energy efficiency for suitable operation in a mobile settings. This paper presents the design of a novel energy-efficient 4-channel wireless potentiostat chip, based on a dual-slope ADC architecture, that features a low-complexity wireless unit and a calibration approach that does not require additional circuitry. The chip was designed in a 0.35μm CMOS process. The simulated results suggest that each potentiostat channel can achieve an estimated energy efficiency of 2.5 pJ/bit from a 1.2 V supply.@en

Wireless power transfer systems, particularly those based on inductive coupling, provide an increasingly attractive method to safely deliver power to biomedical implants. Although there exists a large body of literature describing the design of inductive links, it generally focuses on single aspects of the design process. There is a variety of approaches, some analytic, some numerical, each with benefits and drawbacks. As a result, undertaking a link design can be a difficult task, particularly for a newcomer to the subject. This tutorial paper reviews and collects the methods and equations that are required to design an inductive link for biomedical wireless power transfer, with a focus on practicality. It introduces and explains the published methods and principles relevant to all aspects of inductive link design, such that no specific prior knowledge of inductive link design is required. These methods are also combined into a software package (the Coupled Coil Configurator), to further simplify the design process. This software is demonstrated with a design example, to serve as a practical illustration.

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This paper presents the design of a 1024-channel dual-modality CMOS biosensor suitable for both capacitive sensing and impedance spectroscopy. The chip serves as a platform for detection, localization and monitoring of bacteria and can be adopted for affinity-based assays. The chip features a 32×32 array of unpassivated metal electrodes formed on the top metal of a 0.18μm CMOS process, with an overall sensing area of 2.06 mm2. The system design is based on a shared in-pixel integrator that can be used as a charge amplifier for capacitive sensing (CS) or as part of a transimpedance amplifier for electrical impedance spectroscopy (EIS). The CS mode is capable of a operation bandwidth of 50 MHz at a current consumption of 82 μA per pixel. The EIS channel operates over a bandwidth between 100 Hz and 1 MHz with a total input-referred current noise of 48 pArms and a current consumption of 210 μA per channel.

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A novel pixel architecture for CMOS image sensors is presented. It uses only one amplifier for both integration of the photocurrent and in-pixel noise cancelation, thus minimizing power consumption. The circuit is specifically designed to be used in readout systems for lateral flow immunoassays. In addition a switching technique is introduced enabling the use of column correlated double sampling technique in capacitive transimpedance amplifier pixel architectures without the use of any memory cells. As a result the reset noise which is crucial in these architectures can be suppressed. The circuit has been designed in a 0.35-μm CMOS technology and simulations are presented to show its performance.@en

This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm², is capable of an operational bandwidth of 8 MHz and a linear gain in the range between -6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 μA. Each CR channel occupies an area of 0.21 mm². The chip consumes between 530 μA and 690 μA per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis.

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This paper presents a fully implantable multi-channel neural prosthesis for epidural stimulation. The prosthesis features three telemetry-operated independent stimulators providing in total eighteen stimulation channels. The stimulator circuits were implemented in a 0.6-μm CMOS technology. The prosthesis is protected in a hermetically sealed ceramic enclosure and encapsulated in medical grade silicone rubber. In-vitro measured results with electrodes in saline are presented.

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A fully implantable multi-channel neural prosthesis for epidural stimulation will be demonstrated. The prosthesis features three telemetry-operated independent stimulators providing in total eighteen stimulation channels. The stimulator circuits were implemented in a 0.6-μm CMOS technology. The prosthesis is protected in a hermetically sealed ceramic enclosure and encapsulated in medical grade silicone rubber for long-term implantation. During the live demonstration in-vitro tests with electrodes in saline will be performed with the prosthesis operated wirelessly from a remote computer.

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