Temperature dependent trap characterisation and modelling of silicon carbide MOS capacitor

Conference paper (2024)

Authors

J. Li Electronic Components, Technology and Materials -

S. Vollebregt Electronic Components, Technology and Materials -

Y. Zhang Electronic Components, Technology and Materials -

A. Shekhar DC systems, Energy conversion & Storage -

Alexander May Fraunhofer Institute for Integrated Systems and Devices Technology IISB

W.D. van Driel Electronic Components, Technology and Materials -

Kouchi Zhang Electronic Components, Technology and Materials -

Research Group

Electronic Components, Technology and Materials () (TU Delft)

Temperature dependence Vibrations Silicon carbide Temperature measurement Voltage measurement Electron traps Lattices

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Published Date

2024

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Electronic Components, Technology and Materials

Abstract

Due to the deficient passivation of the interface between silicon carbide and silicon dioxide, the defect-induced capture and release of trapped charges triggered by external Bias Temperature Stress (BTS) leads to parameter shifts and degraded device performance. This study models the trap-induced transient current in silicon carbide metal-oxide-semiconductor capacitors, providing insight into how capacitance and conductance change during C-V measurements under conditions of high temperature, varied frequency, and varied applied voltage.

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- Embargo expired in 09-10-2024