A sparse spin qubit array with integrated control electronics

Conference paper (2019)

Authors

J.M. Boter QuTech Advanced Research Centre, QCD/Vandersypen Lab - QuTech Advanced Research Centre , Kavli institute of nanoscience Delft
J.P. Dehollain Lorenzana QuTech Advanced Research Centre, QCD/Vandersypen Lab - QuTech Advanced Research Centre , Kavli institute of nanoscience Delft
J.P.G. van Dijk QuTech Advanced Research Centre, OLD QCD/Charbon Lab , Kavli institute of nanoscience Delft
T. Hensgens QuTech Advanced Research Centre, Kavli institute of nanoscience Delft, QCD/Vandersypen Lab - QuTech Advanced Research Centre
R. Versluis TNO, BUS/General , QuTech Advanced Research Centre
James S. Clarke Kavli institute of nanoscience Delft
M. Veldhorst Kavli institute of nanoscience Delft, QuTech Advanced Research Centre, QCD/Veldhorst Lab - QuTech Advanced Research Centre
F. Sebastiano QuTech Advanced Research Centre, (OLD)Applied Quantum Architectures
L.M.K. Vandersypen Kavli institute of nanoscience Delft, QuTech Advanced Research Centre, Intel Labs, QN/Vandersypen Lab - AS , QCD/Vandersypen Lab - QuTech Advanced Research Centre
Research Group
QCD/Vandersypen Lab (QuTech Advanced Research Centre) (TU Delft)
Copyright: © 2019 J.M. Boter, J.P. Dehollain Lorenzana, J.P.G. van Dijk, T. Hensgens, R. Versluis, J. S. Clarke, M. Veldhorst, F. Sebastiano, L.M.K. Vandersypen
DOI: https://doi.org/10.1109/IEDM19573.2019.8993570
More Info
expand_more

Published Date

2019

Language

English

Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Faculty

QuTech Advanced Research Centre

Department

Quantum Computing Division

Research Group

QCD/Vandersypen Lab

Abstract

Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.

Files

1912.06461.pdf
(pdf | 0.928 Mb)
Unknown license

Download not available

08993570taverne.pdf
(pdf | 1.1 Mb)
- Embargo expired in 13-09-2020
Unknown license