This work presents a switched capacitor power converter (SCPC) with instant transient response and minimized steady-state output ripple. The proposed SCPC employs a hybrid control strategy that amalgamates the strengths of hysteresis and continuous frequency modulation (CFM) controls, thus elevating transient performance while maintaining a small steady-state ripple. The system adopts a 10 -phase interleaved recursive switched capacitor (RSC) topology with adaptive capacitor sizing to achieve configurable voltage-conversion ratios (VCR) with heightened efficiency, power density, and load ability. Additionally, a novel adaptive switch-sizing technique is introduced to improve light-load efficiency. Fabricated in 180-nm BCD technology, the chip supports a wide-range load current of 0.7mA-120mA and converts a 0.8 -to-3.6V input to a 0.25 -to2.4 V output with a peak efficiency of 87.1%. The proposed converter simultaneously achieves a low voltage ripple of 12 mV and an over-/under-shoot voltage of less than 50 mV even under significant load transient steps (171X).

Multiple voltage conversion ratio (VCR) recursive switched-capacitor (SC) dc-dc converters, based on several basic 2:1 converters, are widely used for on-chip power supplies due to their flexible VCRs for higher energy efficiency. However, conventional multiple VCR SC converters usually have one or more 2:1 converters unused for some VCRs, which results in lower power density and chip area wastage. This article presents a new recursive dc-dc converter system, which can dynamically reconfigure the connection of all on-chip 2:1 converter cells so that the unused converters in the conventional designs can be reused in this new architecture for increasing the load-driving capacity, power density, and power efficiency. To validate the design, a 4-bit-input 15-ratio system was designed and fabricated in a 180-nm BCD process, which can support a maximum load current of \text{0.71}\,\text{mA} and achieves a peak power efficiency of 93.1% with 105.3\,\mu \text{A/mm} {2} chip power density from a 2-V input power supply. The measurement results show that the load-driving capacity can become 6.826×, 2.236×, and 2.175× larger than the conventional topology when the VCR is 1/2, 1/4, and 3/4, respectively. In addition, the power efficiency under these specific VCRs can also be improved considerably.

This brief presents a 48V-to-1V 10-level dual inductor hybrid converter (DIHC) containing 11 on-chip switches and an off-chip gallium nitride (GaN) switch. Thanks to the 10-level Dickson switched-capacitor (SC) circuit, most of the voltage stress will be taken over by off-chip capacitors, which reduces the voltage stress of each switch to 4.8 V and takes full advantage of the voltage pressure on the 5-V on-chip transistors. This proposed structure is implemented in a 0.18- $\mu \text{m}$ BCD process to convert 48-V input to 1-V output with up to 18-A current load. The post-layout simulations show that a peak power efficiency of 90.6% can be achieved at 5.2-A loading and the power density is about 0.333 $W/mm^{2}$ considering the power stage area.