This thesis describes the design of a 3rd order 1-bit delta-sigma modulator whose input-signal range (0 to 1.95V) exceeds its supply voltage (1.2V). By using a passive input stage and a single-OTA resonator, this beyond-the-rails modulator realizes a 3rd order loop filter with on
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This thesis describes the design of a 3rd order 1-bit delta-sigma modulator whose input-signal range (0 to 1.95V) exceeds its supply voltage (1.2V). By using a passive input stage and a single-OTA resonator, this beyond-the-rails modulator realizes a 3rd order loop filter with only two amplifiers instead of the usual three and thus achieves state-of-the-art energy efficiency. Realized in a standard TSMC 65nm CMOS technology, the modulator achieves 99.24dB SNR, 99.2dB SNDR and 100dB DR in a bandwidth of 24kHz while consuming only 80μW. This translates into the highest energy efficiency (FoMSNDR, 184dB) reported for a continuous-time delta-sigma modulator.
