20 records found
1
Trade offs in the design of a router with guaranteed and best-effort services for networks on chip
A inified approach to mapping and routing on a network-on-chip for both best-effort and guaranteed service traffic
A methodology for mapping multiple use-cases onto networks on chips
Transaction monitoring in networks on-chip: the on-chip run-time perspective
Mapping and configuration methods for multi-use-case networks on chips
A buffer-sizing algorithm for networks in chip using TDMA and credit-based end-to-end flow control
Low-cost task scheduling for distributed-memory machines
CPR: Mixed Task and Data Parallel Scheduling for Distributed Systems.
A low-cost approach towards mixed task and data parallel scheduling
CPR: mixed task and data parallel scheduling for distributed systems
Compile-time scheduling for distributed-memory systems
Preemptive task scheduling for distributed systems
Fast and effective task scheduling in heterogeous systems
The distributed ASCI supercomputer project
LLB: a fast and effective scheduling algorithm for distributed-memory systems
On the complexity of list scheduling algorithms for distributed-memory systems
FLB: Fast Load Balancing for distributed-memory machines
List scheduling complexity revisited
Improving processor selection complexity in list scheduling algorithms
