Context: Future automotive customer functions will be highly personalisable and adapt their settings proactively in an intelligent way. Aim: We aim at designing generic architectural patterns for functional architectures containing machine learning components. Method: We first formalise a new architectural model. Based on this model, we present and discuss three alternative architectural patterns: (1) concurrent learning, (2) end-to-end learning, and (3) user shadow learning. For these patterns, three alternative integration approaches are discussed: (i) centralised holistic approach, (ii) domain-specific approach, and (iii) dedicated approach. Moreover, we conduct an evaluation using real car data for different customer functions. Conclusion: We propose the use of the user shadow learning pattern in the dynamic architectural model. The user shadow learning pattern is not affected by safety constraints, as is usually the case for integrating artificial intelligence, as it only models user behaviour while leaving the original function intact. To integrate the multitude of models, we propose a domain-specific approach. This approach provides a balance between the trade-offs in the dedicated approach and the holistic approach, being high computational overhead and design complexity, respectively.

This paper presents the definition and implementation of a quantum computer architecture to enable creating a new computational device - a quantum computer as an accelerator. A key question addressed is what such a quantum computer is and how it relates to the classical processor that controls the entire execution process. In this paper, we present explicitly the idea of a quantum accelerator which contains the full stack of the layers of an accelerator. Such a stack starts at the highest level describing the target application of the accelerator. The next layer abstracts the quantum logic outlining the algorithm that is to be executed on the quantum accelerator. In our case, the logic is expressed in the universal quantum-classical hybrid computation language developed in the group, called OpenQL, which visualised the quantum processor as a computational accelerator. The OpenQL compiler translates the program to a common assembly language, called cQASM, which can be executed on a quantum simulator. The cQASM represents the instruction set that can be executed by the micro-architecture implemented in the quantum accelerator. We propose that the industrial and societal application developers use perfect qubits that have no decoherence or error-rates. The perfect qubits offers facilities to the quantum application developer and they are not blocked by issues such as decoherence.

Quantum computers hold great promise for accelerating computationally challenging algorithms on noisy intermediate-scale quantum (NISQ) devices in the upcoming years. Much attention of the current research is directed towards algorithmic research on artificial data that is disconnected from live systems, such as optimization of systems or training of learning algorithms. In this paper we investigate the integration of quantum systems into industry-grade system architectures. In this work we propose a system architecture for the integration of quantum accelerators. In order to evaluate our proposed system architecture we investigated various data-driven functions for various accelerators, including a classical system, a gate-based quantum accelerator and a quantum annealer. The data-driven function predict user preference and is trained on real-world data. This work also includes an evaluation of the quantum enhanced kernel, that previously was only evaluated on artificial data. In our evaluation, we showed that the quantum-enhanced kernel performs at least equally well to a classical state-of-The-Art kernel when simulated. We also showed a low reduction in accuracy and latency numbers within acceptable bounds when running on the gate-based IBM quantum accelerator. We therefore conclude it is feasible to integrate NISQ-era devices in industry-grade system architectures in preparation for future advancements in quantum hardware.