This brief presents a capacitively-biased CMOS voltage reference, which can operate from a sub-1V supply while achieving a low temperature coefficient (TC) and a competitive power-supply rejection ratio (PSRR). The reference voltage is generated by a capacitive bias circuit that provides a well-defined proportional-to-absolute-temperature (PTAT) bias current for a ΔVth type reference that consists of two stacked MOSFETs with different threshold voltages. The generated output voltage is sampled by an auto-zeroed (AZ) buffer, which can drive capacitive loads up to 2 nF. Fabricated in a 65 nm CMOS process, the prototype voltage reference occupies 0.058 mm2, including the AZ buffer and an on-chip timing generator. It outputs a reference voltage of 204.1 mV with a minimum supply voltage of 0.7 V. It achieves a TC of 18 ppm/° C from -40 ° C to 85 ° C and a PSRR of -75 dB at 100 Hz with only 200 μV ripple.

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This paper presents a neural recording IC featuring lossy compression during digitization, thus preventing data deluge and enabling a compact active digital pixel design. The wired-OR-based compression discards unwanted baseline samples while allowing the reconstruction of spike samples. The IC features a 32x32 MEA with 36 μ m pixel pitch and consumes 268nW per pixel from a single 1V supply. It achieves 9.8 μ VRMS input-referred noise and 0.3-5kHz bandwidth, resulting in NEF/PEF of 3.7/14.1.

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Probably the most distinct divide in electronic circuits is that between digital and linear (analog) circuits. Using vacuum tubes; later, transistors; and then ICs, circuits based on switching (binary and digital signals) and amplification (analog signals) have always been at the heart of electronic systems. Even though electronics are making our world more digital, the real world remains stubbornly analog. Circuits for interfacing sensors and driving actuators, amplifying (weak) analog signals, manipulating these signals through analog signal processing, and, finally, converting them into the digital domain and vice versa were, are, and will remain fundamental research and development fields in circuit design. Due to the wide scope of the field, ranging from RF circuits, power management, reference generation, filter design, and oscillators to comparators and other nonlinear circuits, just to name a few, it is clear that a short review article cannot possibly mention all topics, let alone cover them all. So, choices were made. We begin this article with amplifiers, which are one of the critical analog building blocks that often determine system performance. We briefly review the early days of IC-based amplifiers and some outstanding circuit innovations for amplifier design. Thereafter, we highlight the history and state of the art of ADCs, their architectures, and efficiency improvements over four decades. Finally, we review sensor interfaces, first with a general focus on their history and the state of the art of various sensor modalities and, second, with a special focus on biomedical interface circuits for biopotential recording in the context of neural amplifiers. With this variety of topics, we intend to highlight the importance of the transistor and analog ICs to the world as we know it today.@en

This article presents an energy-efficient dual- RC frequency reference intended for wireless sensor nodes. It consists of a digital frequency-locked loop (FLL) in which the frequency of a digitally controlled oscillator (DCO) is locked to a temperature-independent phase shift derived from two different RC poly-phase filters (PPFs). Phase shifts with complementary temperature coefficients (TCs) are generated by using PPFs made from different resistor types (p-poly and silicided p-poly). The phase shift of each filter is determined by a zero-crossing (ZC) detector and then digitized by a digital phase-domain ΔΣ modulator ( Φ - ΔΣM ). The results are then combined in the digital domain via fixed polynomials to produce a temperature-independent phase shift. This highly digital architecture enables the use of a sub-1-V supply voltage and enhances energy and area efficiency. The 28-MHz frequency reference occupies 0.06 mm2 in a 65-nm CMOS process. It achieves a period jitter of 7 ps ( 1σ ) and draws 142 μW from a 0.9-V supply, which corresponds to an energy consumption of 5 pJ/cycle. Furthermore, it achieves ±200 ppm inaccuracy from −40∘C to 85 ∘C after a two-point trim.

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Wireless sensor nodes in battery-powered internet-of-things (loT) applications require a stable on-chip frequency reference with low energy (<10 pJ / cycle) and high frequency stability (below ±300ppm). CMOS RC frequency references are promising due to their low-cost integration and high energy efficiency [1] –[5]. Conventional RC references, however, achieve only moderate accuracy (a few %) due to the large temperature coefficient (TC) of on-chip resistors [3]. First-order TC compensation can be achieved by combining resistors with complementary TCs [1], [2]. Although this is energy efficient (<6 pJ / cycle), it only partially compensates for the resistors’ high-order TCs, limiting the resulting accuracy to about ±500 ppm. Better accuracy (±100 ppm [4]) can be achieved by using the output of a digital temperature sensor (TS) to perform a polynomial correction of the phase-shift (μp,T) of an RC filter (Fig. 31.2.1). Alternatively, the phase-shifts (μp. and μN) of two RC filters with complementary TCs can be linearized (Tp. and T N ) and combined in the digital domain. Such dual-RC frequency references can also achieve good accuracy (±200 ppm [5]). However, both architectures employ an analog phase-domain ΔΣ modulator (Φ−ΔΣM) for each RC filter, which consumes significant energy (25pJ/cycle [4] and 107pJ/ cycle [5]) and area (0.3mm2[4]. and 1.65mm2[5]).@en

Microprocessors and SoCs employ multiple temperature sensors to prevent overheating and ensure reliable operation. Such sensors should be small (<10,000μm2) to monitor local hot-spots in dense layouts. They should also be moderately accurate (1°C) up to high temperatures (≥125°C), so that the system throttling temperature can be set as close as possible to the maximum allowable die temperature. Furthermore, they should be fast (1kS/s) and consume low power (tens of μW).

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Modeling linear periodically time-varying (LPTV) circuits is challenging due to the presence of frequency translation. Many approaches have been proposed that simplify the analysis and provide intuition into the operation of these circuits. It is critical to select the proper model when designing LPTV systems: too complex, and intuition is lost; too simple, and numerical accuracy degrades. This work shows how a conversion matrix-based model can be used for mixer-first receivers with complex feedback in the presence of finite switch transitions. This model accurately predicts S11 below -10 dB for all tested transition times, in contrast with prior models, which are shown to be invalid with transitions beyond 2% of the clock period. As a design tool, this approach models gain, harmonic rejection ratio, and noise figure within 0.1 dB of simulation with switch transitions even at 5% of the clock period.

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This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor,fabricated in 65-nm CMOS,occupies 5800 μm² and achieves moderate accuracy [±1.2 °C (3σ)] over a wide temperature range (-50 °C to 105 °C) after a one-point trim. This is 2× better than the previous compact resistor-based sensors. Operating from 0.85 to 1.3-V supplies,it consumes 32.5-μA and achieves 2.8-mK resolution in a 1-ms conversion time,which corresponds to a resolution FoM of 0.26 pJ•K2.

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This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor, fabricated in 65-nm CMOS, occupies 5800 μ m2 and achieves moderate accuracy [±1.2 °C (3 σ)] over a wide temperature range (-50 °C to 105 °C) after a one-point trim. This is 2× better than the previous compact resistor-based sensors. Operating from 0.85 to 1.3-V supplies, it consumes 32.5-μ A and achieves 2.8-mK resolution in a 1-ms conversion time, which corresponds to a resolution FoM of 0.26 pJ K2.

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In microprocessors and DRAMs, on-chip temperature sensors are essential components, ensuring reliability by monitoring thermal gradients and hot spots. Such sensors must be as small as possible, since multiple sensors are required for dense thermal monitoring. However, conventional BJT-based temperature sensors are not compatible with the sub-1V supply of advanced processes. Subthreshold MOSFETs can operate from lower supplies, but at high temperatures their performance is limited by leakage [1,2]. Thermal diffusivity (TD) sensors achieve sub-1V operation and small area with moderate accuracy, but require milliwatts of power [3]. Recently, resistor-based sensors based on RC WienBridge (WB) filters have realized high resolution and energy efficiency [4,5]. Fundamentally, they are robust to process and supply-voltage scaling. However, their readout circuitry has been based on continuous-time (CT) ΔΣ ADCs or frequency-locked loops (FLLs), which require precision analog circuits and occupy considerable area (>0.7mm ² ).

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This paper presents a compact resistor-based CMOS temperature sensor intended for dense thermal monitoring. It is based on an RC poly-phase filter (PPF), whose temperature-dependent phase shift is read out by a frequency-locked loop (FLL). The PPF's phase shift is determined by a zero-crossing (ZC) detector, allowing the rest of the FLL to be realized in an area-efficient manner. Implemented in a 65-nm CMOS technology, the sensor occupies only 7000 μm². It can operate from supply voltages as low as 0.85 V and consumes 68 μW. A sensor based on a PPF made from silicided p-poly resistors and metal-insulator-metal (MIM) capacitors achieves an inaccuracy of ±0.12 °C (3σ) from -40 °C to 85 °C and a resolution of 2.5 mK (rms) in a 1-ms conversion time. This corresponds to a resolution figure-of-merit (FoM) of 0.43 pJ·K².

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