Information literacy has gradually become one of the necessary qualities in current and future safety practices. The calculation and assessment of information literacy of safety professionals is an effective way to understand their information literacy level. This paper, therefore, aims to evaluate the information literacy level of safety management personnel, for improving their ability to comprehend safety language/technology/information. Based on the theory of safety information systems and the characteristics of safety professionals, this study develops an index system to assess the information literacy level of safety professionals. The index system consists of five indexes: safety information demand consciousness, safety information acquisition ability, safety information evaluation ability, safety information utilization ability, and information ethics. According to the analytic hierarchy process method, the weight of the index can be determined. This developed method was implemented to evaluate the safety information literacy level of 40 safety professionals from four different corporations. The quantitative results of the fuzzy evaluation are in good agreement with the qualitative analysis results, indicating that the index system has excellent applicability and can be applied to the evaluation of the information literacy level of safety professionals. Besides, recommendations are put forward to improve the information literacy of safety professionals.@en

This paper presents an ultrasound receiver ASIC in 180nm CMOS that enables element-level digitization of echo signals in miniature 3D ultrasound probes. It is the first to integrate an analog front-end and a 10-b Nyquist ADC within the 150 μ m element pitch of a 5-MHz 2D transducer array. To achieve this, a hybrid SAR/shared-single-slope architecture is proposed in which the ramp generator is shared within each 2 × 2 subarray. The ASIC consumes 1.54mW/element and has been successfully demonstrated in an acoustic imaging experiment.

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Data acquisition from 2-D transducer arrays has become one of the main challenges for the development of endoscopic and catheter-based 3-D ultrasound imaging devices. Front-end ASICs with sub-array pre-beamforming have been reported that reduce the cable number by an order of magnitude. Further channel reduction requires digitization in the front-end ASIC to facilitate more in-probe data processing functions. Prior solutions, however, are too large and power-hungry to be integrated in a miniature ultrasound probe. In this work, we present a front-end ASIC with an element-pitch-matched layout that combines sub-array beamforming, digitization and high-speed data transmission. It achieves a 36-fold channel-count reduction and a record power-efficiency with less than 1 mW/element power dissipation in receive.@en

This paper presents a front-end application-specific integrated circuit (ASIC) that demonstrates the feasibility of inprobe digitization for next-generation miniature 3-D ultrasound probes with acceptable power- and area-efficiency. The proposed design employs a low-power charge-domain ADC that is directly merged with the sample-and-hold delay lines in each subarray, and high-speed datalinks at the ASIC periphery to realize an additional channel-count reduction compared to prior work based on analog subarray beamforming. The 4.8 × 2 mm² ASIC, which has a compact layout element-matched to a 5-MHz 150-μm-pitch PZT matrix transducer, achieves an overall 36-fold channel-count reduction and a state-of-the-art power-efficiency with less than 1 mW/element power dissipation while receiving, which is acceptable even when scaled up to a 1000-element probe. The prototype ASIC has been fabricated in a 0.18 μm CMOS process. Its functionality has been successfully evaluated with both electrical and acoustical measurements.

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