We propose a classical infrastructure for a quantum computer implemented in CMOS. The peculiarity of the approach is to operate the classical CMOS circuits and systems at deep-cryogenic temperatures (cryoCMOS), so as to ensure physical proximity to the quantum bits, thus reducing thermal gradients and increasing compactness. CryoCMOS technology leverages the CMOS fabrication infrastructure and exploits the continuous effort of miniaturization that has sustained Moore's Law for over 50 years. Such approach is believed to enable the growth of the number of qubits operating in a fault-tolerant fashion, paving the way to scalable quantum computing machines.@en

The electrical properties of a Single Hole Field Effect Transistor (SH-FET) based on CMOS technology are analyzed in a cryogenic environment. Few electron–hole Coulomb diamonds are observed using quantum transport spectroscopy measurements, down to the limit of single hole transport. Controlling the hole filling of the SH-FET is made possible by biasing the top gate, while the bulk contact is employed as a back gate that tunes the hole state coupling with the contacts and their distance from the interface. We compare the cryogenic Coulomb blockade regime with the room temperature regime, where the device operation is similar to that of a standard p-MOSFET.@en