A combined design-time/test-time study of the vulnerability of sub-threshold devices to low voltage fault attacks

Journal article (2014)

Authors

A Barenghi External organisation
C Hocquet External organisation
D Bol External organisation
FX Standaert External organisation
F. Regazzoni Signal Processing Systems - EEMCS
I Koren External organisation
Research Group
Signal Processing Systems (EEMCS) (TU Delft)
Copyright: © 2014 A Barenghi, C Hocquet, D Bol, FX Standaert, F. Regazzoni, I Koren
DOI: https://doi.org/10.1109/TETC.2014.2316509
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Published Date

2014

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Signal Processing Systems

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