A 252 × 144 SPAD Pixel Flash Lidar with 1728 Dual-Clock 48.8 PS TDCs, Integrated Histogramming and 14.9-to-1 Compression in 180NM CMOS Technology

Conference paper (2018)

Authors

S.A. Lindner University of Zürich, Swiss Federal Institute of Technology
C. Zhang (OLD)Applied Quantum Architectures
I.M. Antolović (OLD)Applied Quantum Architectures
Martin Wolf University of Zürich
E. Charbon-Iwasaki-Charbon University of Zürich, Swiss Federal Institute of Technology
Research Group
(OLD)Applied Quantum Architectures
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Published Date

2018

Language

English

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Research Group

(OLD)Applied Quantum Architectures

Abstract

A 252 × 144 single-photon avalanche diode (SPAD) pixel FLASH LiDAR is implemented in 180nm CMOS with 28.5μm pixel pitch and 28% fill factor. The sensor includes a collision detection bus with dynamic reallocation of 48.8 ps dual-clock time-to-digital converters (TDCs). It can operate in time-correlated single-photon counting (TCSPC), single-photon counting (SPC), peak-detection (PD) and partial-histogramming (PH) modes. The PD and PH modes are enabled by the first implementation of integrated histogramming for a full array via an SRAM based partial histogramming readout (PHR) scheme. This provides 16 5-bit bins for each pixel to enable a 14.9-to-l compression ratio.

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