A co-design methodology for scalable quantum processors and their classical electronic interface

van Dijk, J.P.G.; Vladimirescu, A.; Babaie, M.; Charbon-Iwasaki-Charbon, E.; Sebastiano, F.

A co-design methodology for scalable quantum processors and their classical electronic interface

Conference paper (2018)

Authors

J.P.G. van Dijk OLD QCD/Charbon Lab , Kavli institute of nanoscience Delft

A. Vladimirescu Institut Supérieur d’Electronique de Paris,, OLD QCD/Charbon Lab , University of California

M. Babaie Electronics -

E. Charbon-Iwasaki-Charbon Swiss Federal Institute of Technology, Intel Labs, (OLD)Applied Quantum Architectures , OLD QCD/Charbon Lab , Kavli institute of nanoscience Delft

F. Sebastiano (OLD)Applied Quantum Architectures

Research Group

OLD QCD/Charbon Lab

Quantum computing Quantum dots Computational modeling Program processors Integrated circuit modeling Hardware design languages C++ languages

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Published Date

2018

Language

English

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Research Group

OLD QCD/Charbon Lab

Abstract

A quantum computer fundamentally comprises a quantum processor and a classical controller. The classical electronic controller is used to correct and manipulate the qubits, the core components of a quantum processor. To enable quantum computers scalable to millions of qubits, as required in practical applications, the simultaneous optimization of both the classical electronic and quantum systems is needed. In this paper, a co-design methodology is proposed for obtaining an optimized qubit performance while considering practical trade-offs in the control circuits, such as power consumption, complexity, and cost. The SPINE (SPIN Emulator) toolset is introduced for the co-design and co-optimization of electronic/quantum systems. It comprises a circuit simulator enhanced with a Verilog-A model emulating the quantum behavior of single-electron spin qubits. Design examples show the effectiveness of the proposed methodology in the optimization, design and verification of a whole electronic/quantum system.