Improving Metastability in Synchronous SAR ADCs
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Abstract
This thesis focuses on the design and optimization of Successive-approximation (SAR) Analog-to-Digital Converter (ADC), with a primary focus on enhancing the Bit Error Rate (BER). SAR ADCs are widely used in various applications due to their power-efficient characteristics. The critical point addressed in this research is improving the BER of synchronous SAR ADCs without the necessity to reduce the sampling speed...
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File under embargo until 21-08-2025