Device-Aware Test for Emerging Memories: Enabling Your Test Program for DPPB Level

Conference paper (2020)

Authors

L. Wu Computer Engineering - EEMCS
M. Fieback Computer Engineering - EEMCS
M. Taouil Computer Engineering - EEMCS , Cognitive IC
S. Hamdioui Cognitive IC, Quantum & Computer Engineering
Research Group
Computer Engineering (EEMCS) (TU Delft)
Copyright: © 2020 L. Wu, M. Fieback, M. Taouil, S. Hamdioui
DOI: https://doi.org/10.1109/ETS48528.2020.9131559
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Published Date

2020

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

This paper introduces a new test approach: device-aware test (DAT) for emerging memory technologies such as MRAM, RRAM, and PCM. The DAT approach enables accurate models of device defects to obtain realistic fault models, which are used to develop high-quality and optimized test solutions. This is demonstrated by an application of DAT to pinhole defects in STT-MRAMs and forming defects in RRAMs.

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