Circuits and Systems for a Spiking Neuromorphic Network in 28 nm CMOS
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Abstract
Neuromorphic computing can be used to efficiently implement spiking neural networks.
Such spiking neural networks can be used in edge AI applications, where low power consumption is paramount.
The use of analog components allows for extremely low power implementations.
This thesis contributes the designs of an analog spike generator, synaptic elements and an accumulating neuron in 28 nm CMOS technology.
The elements are assembled in a neural network and laid out in an SoC.
Energy consumption numbers of less than 1 pJ/synaptic operation are achieved in the analog neuromorphic components.