This article describes a high-performance capacitance-to-digital converter (CDC) for sub-nm displacement sensing with an electrically floating target. Intended to be integrated into a displacement sensor probe, the CDC consumes only 560μW. It achieves 98.5-dB SNR in a 1-ms conversion time. With a sensing O 8-mm probe and a 25μm stand-off distance from the target, it achieves 0.18-nm resolution. Moreover, it offers an in-band common-mode rejection ratio (CMRR) higher than 117 dB, providing decent electric field interference immunity.

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Coulomb counting is a widely used method to estimate battery state-of-charge (SoC). It involves measuring and integrating the battery’s current to determine its net charge flow.@en

This paper describes a high-resolution energy-efficient CMOS temperature sensor, intended for the temperature compensation of MEMS/quartz frequency references. The sensor is based on silicided poly-silicon thermistors, which are embedded in a Wien-bridge RC filter. When driven at a fixed frequency, the filter exhibits a temperature-dependent phase shift, which is digitized by an energy-efficient continuous-time phase-domain delta-sigma modulator. Implemented in a 0.18-μm CMOS technology, the sensor draws 87 μA from a 1.8 V supply and achieves a resolution of 410 μKrms in a 5-ms conversion time. This translates into a state-of-the-art resolution figure-of-merit of 0.13 pJ·K². When packaged in ceramic, the sensor achieves an inaccuracy of 0.2 °C (3σ) from -40 °C to 85 °C after a single-point calibration and a correction for systematic nonlinearity. This can be reduced to ±0.03 °C (3σ) after a first-order fit. In addition, the sensor exhibits low 1/f noise and packaging shift.

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This letter presents the most accurate shunt-based high-side current sensor ever reported. It achieves a 25 V input common-mode range from a single 1.8-V supply by using a beyond-the-rails ADC. A hybrid analog/digital temperature compensation scheme is proposed to simplify the circuit implementation while maintaining the state-of-the-art accuracy. Over a ±12-A current range, the sensor exhibits 0.35% gain error from -40 °C to 85 °C with 3× better power efficiency.@en

This paper describes a high-performance Capacitance-to-Digital Converter (CDC) for sub-nm displacement sensing with an electrically floating target. Intended to be integrated into a displacement sensor probe, the CDC consumes only 560μW. It achieves 98.5dB SNR in a 1ms conversion time, which is 34 times more energy-efficient than the prior art. Moreover, it also offers a 117dB in-band (1kHz) Common-mode Rejection Ratio (CMRR), providing decent electric field interference immunity.

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Temperature sensors are often used for the temperature compensation of frequency references [1-5]. High resolution and energy efficiency are then critical requirements, the former to minimize jitter and the latter to minimize power dissipation in a given conversion time. A MEMS-resonator-based sensor meets both criteria [1], but requires two resonators. In principle, resistor-based sensors also meet these criteria, and are CMOS compatible, but previous designs have been limited by the power dissipation [2-4] or 1/f noise [6] of their readout electronics. This paper describes a CMOS temperature sensor that digitizes the temperature-dependent phase shift of an RC filter. It achieves 410μKrms resolution in a 5ms conversion time, while consuming only 160μW. This corresponds to a resolution FOM of 0.13pJ·K2, a 5× improvement on previous CMOS sensors [6].@en

This paper demonstrates a micropower offset- and temperature-compensated smart pH sensor, intended for use in battery-powered RFID systems that monitor the quality of perishable products. Low operation power is essential in such systems to enable autonomous logging of environmental parameters, such as the pH level, over extended periods of time using only a small, low-cost battery. The pH-sensing element in this work is an ion-sensitive extended-gate field-effect transistor (EGFET), which is incorporated in a low-power sensor front-end. The front-end outputs a pH-dependent voltage, which is then digitized by means of a co-integrated incremental delta-sigma ADC. To compensate for the offset and temperature cross-sensitivity of the EGFET, a compensation scheme using a calibration process and a temperature sensor has been devised. A prototype chip has been realized in a 0.16 μm CMOS process. It occupies 0.35 × 3.9 mm2 of die area and draws only 4 μA from a 1.8 V supply. Two different types of custom packaging have been used for measurement purposes. The pH sensor achieves a linearity of better than ±0.1 for pH values ranging from 4 to 10. The calibration and compensation scheme reduces errors due to temperature cross-sensitivity to less than ±0.1 in the temperature range of 6°C to 25°C.@en

This paper presents an integrated shunt-based current-sensing system (CSS) capable of handling ±36-A currents, the highest ever reported. It also achieves a 0.3% gain error and a 400-μA offset, which is significantly better than the state-of-the-art systems. The heart of the system is a robust 260-μ Ω shunt resistor made from the lead frame of a standard HVQFN plastic package. The resulting voltage drop is then digitized by a precision Δ Σ ADC and a bandgap reference (BGR). At the expense of current handling capability, a ±5-A version of the CSS uses a 10-mΩ on-chip metal shunt to achieve just a 4-μ A offset. Both designs are realized in a standard 0.13-μm CMOS process and draw 13 μA from a 1.5-V supply. Compensation of the spread and nonlinear temperature dependency of the shunt resistor R_shunt is accomplished by the use of a fixed polynomial master curve and a single room temperature calibration. This procedure also effectively compensates for the residual spread and nonlinearity of the ADC and the BGR.

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This paper presents a precision CMOS temperature-to-digital converter (TDC), which senses the temperature-dependent base-emitter voltage of substrate PNPs. Measurements on 20 samples from one batch show that it achieves an inaccuracy of ±60 mK (3σ) from-55 °C to +125 °C, after a single room-temperature trim. This state-of-the-art result is mainly due to the extensive use of dynamic error cancellation techniques to generate the PNP's collector currents, thus minimizing the spread in their base-emitter voltages, together with a digital PTAT trim to correct for the spread in the PNP's saturation currents. The effect of process variation on the TDC's inaccuracy was investigated by measuring 80 samples from three different batches. Using the same calibration parameters, they exhibit a maximum untrimmed inaccuracy of ±2 °C (3σ) from-55 °C to +125 °C. This drops to ±100 mK (3σ) after a single point trim. The proposed TDC thus reduces calibration costs by obviating the need for batch-specific calibration parameters, which would otherwise require the multipoint calibration of several samples. The effect of the PNP's current gain β was also investigated with the help of a novel β-detection circuit. Implemented in 0.16-μm CMOS, the TDC occupies 0.16 mm² and draws 4.6 μA from 1.5 to 2 V supply voltages. It achieves a resolution Figure of Merit of 7.8 pJ°C², and a state-of-the-art supply sensitivity of 0.01 °C/V.

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This paper presents an integrated shunt-based current-sensing system (CSS) capable of handling ±36A currents, the highest ever reported. It also achieves 0.3% gain error and 400μA offset, which is significantly better than the state-of-the-art. The heart of the system is a robust 260μΩ shunt made from the lead-frame of a standard HVQFN plastic package. The resulting voltage drop is then digitized by a ΔΣ ADC and a bandgap reference (BGR). At the expense of current handling capability, a ±5A version of the CSS uses a 10mΩ on-chip metal shunt to achieve just 4μA offset. Both designs were realized in a standard 0.13μm CMOS process.@en

This paper presents the most accurate BJT-based CMOS temperature-to-digital converter (TDC) ever reported, with an inaccuracy of ±60mK (3σ) from -70°C to 125°C. This is 2× better than the state-of-the-art, despite being implemented in a process (160nm) that only offers low-βF (<;5) PNPs. It is also the most energy-efficient ever reported, with a resolution FOM of 7.3pJ°C2. This level of performance is achieved by an improved βF-compensation scheme, the use of dynamic error correction techniques to suppress non-BJT related errors and the use of an energy-efficient zoom-ADC based on current-reuse OTAs. These techniques also result in very low power-supply sensitivity (12mK/V), thus maintaining TDC accuracy for supply voltages ranging from 1.5V to 2V.@en

This paper presents an integrated current-sensing system (CSS) that is intended for the use in battery-powered devices. It consists of a 10 mΩ on-chip metal shunt resistor, a switched-capacitor (SC) ΔΣ ADC, and a dynamic bandgap reference (BGR) that provides the ADC's reference voltage and also senses the shunt's temperature. The CSS is realized in a standard 0.13 μm CMOS process, occupies 1.15 mm2 and draws 55 μA from a 1.5 V supply. Extensive measurements were made on 24 devices, 12 of which were directly bonded to a printed-circuit board (PCB) and 12 of which were packaged in a standard HVQFN plastic package. For currents ranging from -5 to +5 A and over a temperature range of -55 °C to + 85 °C, they exhibit a maximum offset of 16μA and a maximum gain error of ±0.3%. This level of accuracy represents a significant improvement on the state of the art, and was achieved by the use of an accurate shunt temperature compensation scheme, a low-leakage sampling scheme, and several dynamic error correction techniques.@en