CMOS amplifiers suffer from offset (several mVs), offset drift (several µV/°C) and 1/f noise corner (tens of kHz). Dynamic offset compensation (DOC) techniques, such as auto-zeroing and chopping, are often used to achieve low offset (µV level), offset drift (< 20 nV/°C) and 1/f noise corners (several Hz). However, these techniques also have drawbacks, mainly due to the required input switching. This results in unwanted spikes, input current and intermodulation distortion. This thesis presents DOC amplifiers with sub-pA input current, low distortion, as well as quiet outputs.@en

In chopper amplifiers, the interaction between the input signal and the chopper clock can cause intermodulation distortion (IMD). This is due to amplifier delay, which causes signal transitions generated by the input chopper to arrive at the amplifier's output slightly later than the corresponding clock transitions of the output chopper. This causes large signal-dependent spikes in the final output, which can significantly degrade amplifier linearity, especially at input frequencies near even multiples of the chopping frequency FcH, which will cause IMD tones near DC. In [2-4], spread-spectrum clocks are used to convert such tones into noise-like signals. However, this increases the noise floor, without solving the underlying problem. Recently, it has been shown that such spikes can be eliminated by using the fill-in technique [1], in which two identical OTAs are chopped in quadrature, allowing a spike-free output to be generated by switching between their outputs in a ping-pong fashion.

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In chopper amplifiers, the interaction between the input signal and the chopper clock can cause intermodulation distortion (IMD). This is mainly due to finite amplifier bandwidth, which causes signal-dependent output spikes at the chopping transitions. Such chopper-induced IMD can be mitigated by the fill-in technique, which involves ping-ponging between the outputs of two identical OTAs chopped in quadrature, thus generating a spike-free output. In this letter, a relaxed implementation is proposed in which the output of a fill-in OTA is only briefly used to avoid the spikes of a chopped main OTA. As a result, the fill-in OTA does not need to be chopped, and so it can be duty-cycled to save power. Furthermore, the chopper ripple caused by the main OTA can now be suppressed by a single low-noise ripple-reduction loop, rather than the two AZ loops required in a previous ping-pong implementation of the fill-in technique. Compared to the latter, the proposed amplifier achieves similar IMD performance (-125.7 dB), a 25× lower input current (22.6 pA), and a flat noise floor (12 nV/ Hz).

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This article describes an auto-zero stabilized voltage buffer that achieves low offset and low noise with sub-pA input current. A high gain stabilization loop is used to periodically cancel the buffer’s offset. The loop itself is periodically disconnected from the buffer and auto-zeroed, during which its bandwidth is reduced to reduce the associated noise folding. However, this also reduces its offset correction range, and so to avoid overloading, its initial offset is digitally trimmed. To break up the correlation between the residual low-frequency (LF) noise of the auto-zero and stabilization phases, the loop is periodically chopped, which significantly reduces the buffer’s LF noise. Finally, the duty-cycle of the two phases is optimized to bring the buffer’s LF noise density close to 2–√ times its white noise density (14 nV/ Hz−−−√ ), which is the fundamental limit of an AZ amplifier. The buffer also achieves a constant and low input current (0.8 pA), as well as a state-of-the-art offset (0.4 μV ).

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In chopper amplifiers, the interaction between the input signal and the chopper clock can give rise to intermodulation distortion (IMD). This chopper-induced IMD is mainly due to amplifier delay, which causes large pulses at the output of the amplifier's output chopper. This article proposes the use of a so-called fill-in technique to eliminate these pulses, and thus the resulting IMD, by multiplexing the outputs of two identical amplifiers that are chopped in quadrature. A prototype chopper-stabilized amplifier was implemented in a 180-nm CMOS process. Measurements show that the fill-in technique suppresses chopper-induced IMD by 28 dB, resulting in an IMD of -126 dB for input frequencies near 4 F_CH (=80 kHz). It also improves the amplifier's two-tone IMD (with 79 and 80 kHz inputs) from -97 to -107 dB, which is the same as that obtained without chopping.@en

Amplifiers often employ chopping to achieve low offset and low-frequency noise. However, the interaction between the input signal and the chopper clock can cause chopper-induced intermodulation distortion (IMD) [1] -[5]. This is especially problematic for input frequencies (Fin) near even multiples of the chopping frequency (FCH), as the resulting IMD tones fold-back to low frequencies and so cannot be filtered out. In [2] -[4], spread-spectrum clocks are used to convert such tones into noise-like signals. However, this increases the noise floor and does not address the underlying problem. This paper shows that chopper-induced IMD is mainly due to amplifier delay, which results in large chopping spikes. A novel fill-in technique is proposed that mitigates these spikes, and so reduces the chopper-induced IMD. In a prototype chopper-stabilized amplifier, it reduces the chopper-induced IMD by 28dB, resulting in an IMD of -126dB for input frequencies near 4FCH (=80kHz). Similarly, it improves the chopped amplifier's two-tone IMD (79 and 80kHz) from -97dB to -107dB, thus maintaining the same IMD as the un-chopped amplifier.

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This paper presents an input-current trimming scheme for auto-zero amplifiers. Since their input current is mainly due to charge injection,the scheme operates by trimming the clock swing,and hence the charge injection,of two dummy input switches. At room temperature,the trimming scheme reduces the maximum input current of an auto-zero stabilized voltage buffer from 1pA to 0.2pA (13 samples) over its full input voltage range (0 to 1.3V). This increases to 0.4pA over temperature (0 to 85°C),which is well below the leakage of typical ESD diodes,and is the lowest input current ever reported for an auto-zero amplifier.

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The readout of high-impedance sensors and sampled voltage references [1] requires amplifiers that can achieve both low offset and low input current. Recently, it has been shown that this unique combination can be achieved by an auto-zero (AZ) stabilized buffer [2]. However, its low-frequency noise density is surd 5 times higher than the buffer's own white-noise voltage spectral density e _n . Furthermore, its input current is not constant, but varies significantly with the input voltage. To overcome the first issue, a chopped AZ stabilization loop with an optimized duty-cycle is proposed to bring the low-frequency noise density close to surd 2cdot {e}-{n}, the fundamental limit of an AZ stabilized amplifier. The second issue is solved by replacing the transmission-gate input switches used in [2] with NMOS switches and a constant Vgs drive. This keeps their charge injection constant over a wide input voltage range, and results in a constant input current.

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The readout of high impedance sensors and sampled voltage references [1]
requires amplifiers with both low offset and low input current. Chopper amplifiers
can achieve low offset, but the switching of their input chopper gives rise to
significant input current (40 to 110pA) [2-4]. Auto-zero (AZ) amplifiers require
less input switching, but exhibit more voltage noise. However, ping-pong
amplifiers continuously swap two auto-zeroed input stages, leading to more
switching [5,7]. In this work, an AZ stabilized topology is proposed, in which a
single amplifier is always present in the signal path. Only one input switch is
required, resulting in an input current of 0.6pA (max), a 66× improvement on the
state-of-the art [4]. Furthermore, a digitally assisted offset-reduction scheme
reduces its low-frequency (LF) noise to the theoretical √5× limit. It also achieves
a state-of-the-art maximum offset of 0.6μV.@en