With the rising demand for high-bandwidth, high-resolution current sensors, commonly used Hall-effect devices fall short due to their relatively high wide-band noise. The coil-Hall hybrid architecture addresses this issue by combining the Hall plate with a pick-up coil, known for its high SNR at high frequencies. This CMOS-compatible architecture achieves excellent noise and bandwidth performance while maintaining the ability to sense DC signals. However, this performance comes at the cost of increased complexity in combining, calibrating, and stabilizing the two distinct signal paths. This thesis thoroughly investigates the various challenges and trade-offs associated with this architecture and provides a comprehensive overview of potential system solutions. Additionally, the insights gained were used to design a prototype chip for SystematIC Design B.V. Seeking to reduce complexity, this led to the invention of a new system architecture. This new architecture effectively overcomes several challenging trade-offs that have hindered existing designs until now and is considered a promising approach for achieving even better performance in the future.