Re-establishment of electrical conductivity in graphene oxide (GO), the insulating form of graphene, is (partially) accomplished by reduction through high temperature treatments in a reducing atmosphere, or using strongly reducing chemicals or electrolytic processes. The reduction methods are suited for bulk graphene oxide. Spatially resolved reduction of thin films of graphene oxide is important for a wide range of applications such as in microelectronics, where an electrolyte-free, room temperature reduction process is needed. Here, we present spatially resolved solid-state reduction of graphene oxide thin films. We demonstrate that the reduction mechanism is based on electrolysis of water that is adsorbed on the graphene oxide thin film. The reduced graphene oxide thin-films show sheet resistance of only several kOhm, with weak temperature dependence. Graphene oxide can be produced on a large scale and processed using low-cost solution casting techniques. Spatially resolved re-establishment of conductivity in GO can be used in electrically controlled water permeation or in micro- and nanoelectronic applications for instance as an anti-fuse.

Solution-processed memory diodes based on phase separated blends of ferroelectric and semiconducting polymers in the low resistance on-state operate similar to a vertical field-effect transistor at the pinch-off. Numerical simulations have shown that the performance of the diode is dominated by the conduction of charge carriers at the interface between the semiconductor and ferroelectric phases. Here, we present an unambiguous experimental demonstration of the charge injection process in the diodes. We employ a modified diode structure, wherein the electrode in contact with the semiconductor phase has been intentionally removed. Even in the absence of an electrical contact with the semiconductor phase, the diode still shows resistance switching. We provide numerical simulations that reproduce the experimentally measured I-V characteristics and therefore confirm interfacial conduction in the diodes. Furthermore, we discuss the implications of the proposed memory structure particularly in the performance of light-emitting diodes with built-in memory functionality, i.e., MEMOLEDs.

Ultraviolet photoelectron spectroscopy (UPS) is a key technique to determine the work function (Φ) of surfaces by measuring the secondary-electron cut-off (SECO). However, the interpretation of SECO spectra as obtained by UPS is not straightforward for multicomponent surfaces, and it is not comprehensively understood to what extent the length scale of inhomogeneity impacts the SECO. Here, this study unravels the physics governing the energy distribution of the SECO by experimentally and theoretically determining the electrostatic landscape above surfaces with defined patterns of Φ. For such samples, the measured SECO spectra exhibit actually two cut-offs, one representing the high Φ surface component and the other one corresponding to an area-averaged Φ value. By combining Kelvin probe force microscopy and electrostatic modeling, it is quantitatively demonstrated that the electrostatic potential of the high Φ areas leads to an additional energy barrier for the electrons emitted from the low Φ areas. Theoretical predictions of the induced energy barrier dependence on the Φ-pattern length scale and sample bias are further experimentally verified. These findings establish a solid base for reliable SECO interpretation of heterogeneous surfaces and improved reliability of interfacial energy-level diagrams from UPS experiments.