In this paper, a low-power CMOS smart temperature sensor is presented. The temperature information extracted using substrate PNP transistors is digitized with a resolution of 0.03 °C using a precision switched-capacitor (SC) incremental
A/D converter. After batch calibration, an inaccuracy of ±0.25 °C (±3σ ) from −70 °C to 130 °C is obtained. This represents a two-fold improvement compared to the state-ofthe-art. After individual calibration at room temperature, an
inaccuracy better than ±0.1 °C over the military temperature range is obtained, which is in-line with the state-of-the-art. This performance is achieved at a power consumption of 65 μW during a measurement time of 100 ms, by optimizing the power/inaccuracy tradeoffs, and by employing a clock frequency
proportional to absolute temperature. The latter ensures accurate settling of the SC input stage at low temperatures, and reduces the effects of leakage currents at high temperatures.@en

Smart temperature sensors generally need to be trimmed to obtain measurement errors below ±2°C. The associated temperature calibration procedure is time consuming and therefore costly. This paper presents two, much faster, voltage calibration techniques. Both make use of the fact that a voltage proportional to absolute temperature (PTAT) can be accurately generated on chip. By measuring this voltage, the sensor's actual temperature can be determined, whereupon the sensor can be trimmed to correct for its dominant source of error: spread in the on-chip voltage reference. The first calibration technique consists of measuring the (small) PTAT voltage directly, while the second, more robust alternative does so indirectly, by using an external reference voltage and the on-chip ADC. Experimental results from a prototype fabricated in 0.7 ¿m CMOS technology show that after calibration and trimming, these two techniques result in measurement errors (±3¿) of ±0.15°C and ±0.25°C, respectively, in a range from -55°C to 125°C.@en

Due to the trend towards low power operation, as in autonomous systems where power constraints are very high, sensors are increasingly being required to dissipate very low power (few microwatts). In this paper, a low-power version of a smart temperature sensor in 0.7 {it¿m} CMOS technology is presented. Based on accuracy requirements, a minimum biasing current {itIbias} for the sensor¿s bipolar core is determined. Measurement results for {itI{bias}} = 250{itnA} and CS = 1.25{itpF} (ADC sampling capacitor) are shown. An inaccuracy below ±0.15°C from ¿55°C to 125°C is achievable with a two-point calibration.@en

In this paper, a low-power version of a high-precision smart temperature sensor in 0.7¿m CMOS technology is presented. The sensor consists of two main blocks: the bipolar front-end and the ADC. The sensor's power dissipation was reduced by reducing the bias current of the substrate PNP transistors - the temperature-sensing element - to the minimum levels set by accuracy requirements. To keep the same current density, the PNPs were reduced in size, as were the ADC sampling capacitors CS, so the sensor's conversion time is maintained. Increased mismatch errors due to the use of lower bias currents and smaller devices are mitigated by Dynamic Element Matching and chopping techniques. For an accuracy requirement of ±0.1°C, a minimum PNP bias current of 250nA is found. Measurement results for Ibias = 250nA and CS = 1.25pF show a 3¿ inaccuracy below ±0.3°C after offset calibration, and below ±0.08°C with a two-point calibration, from -55°C to 125°C.@en