Estimation of the collapse (V_col) and snapback (V_sb) voltages of Capacitive Micromachined Ultrasonic Transducers (CMUTs) is usually performed by extracting C-V curves from low frequency impedance measurements at different bias points. However, impedance analysis in several bias conditions is time-consuming, making this technique unsuitable for wafer-level testing. Additionally, prolonged exposure to high electric fields may lead to charge injection and trapping phenomena in the CMUT in-cavity insulation layers. This paper proposes an adjustment to the conventional impedance analysis technique aimed at enhancing estimation accuracy and introduces a novel technique for fast C-V assessment enabling rapid wafer-level characterization. Results from both techniques are compared, demonstrating the validity of the proposed approaches.