Electrothermal characterization of silicon-on-glass VDMOSFETs

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Abstract

Electrothermal consequences of implementing bulk-silicon RF power MOS processes in the silicon-on-glass substrate transfer technology are investigated in this paper. Fabricated silicon-on-glass vertical double-diffused MOSFETs are measured on-wafer and very large thermal resistance values are extracted for each design. The influence of the thermal resistance on RF performance is analyzed, and it is shown that strong electrothermal feedback severely lowers the power capability and strongly increases the operating temperature. A combination of low-thermal contacting and surface mounting to thermally conducting printed circuit board is shown to be very efficient in reducing the large thermal resistance. Numerical thermal simulations demonstrate that surface-mounted silicon-on-glass transistors can have lower thermal resistance than the bulk-silicon device with a wafer thickness reduced down to 100 ¿m.