A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing

Conference paper (2002)

Authors

Jie Han External organisation
P.P. Jonker ImPhys/Quantitative Imaging
Research Group
ImPhys/Quantitative Imaging
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Published Date

2002

Language

Undefined/Unknown

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Research Group

ImPhys/Quantitative Imaging

Abstract

In order to make systems based on nanometerscale devices reliable, the design of faulttolerant architectures will be necessary. This paper presents a novel faulttolerant technique for future nanocomputers, NAND multiplexing. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized
imperfect interconnect, had been studied with an extreme high degree of redundancy (A 4333). In this paper, the NAND multiplexing is extended to rather low degree of redundancy, leading it to a comprehensive faulttolerant theory. The stochastic Markov nature in the heart of the system is discovered, and the characteristics of such a Markov chain are exploited.
This faulttolerant technique is potentially useful for future nanoelectronics.

Keywords: Markov Process, Normal Distribution, Binomial Distribution