Nanometer CMOS characterization and compact modeling at deep-cryogenic temperatures

Conference paper (2017)

Authors

R.M. Incandela OLD QCD/Charbon Lab
L Song ImPhys/Quantitative Imaging , Tsinghua University
Harald Homulle OLD QCD/Charbon Lab
F. Sebastiano (OLD)Applied Quantum Architectures
E. Charbon-Iwasaki-Charbon Intel Labs, Swiss Federal Institute of Technology, OLD QCD/Charbon Lab , (OLD)Applied Quantum Architectures
A. Vladimirescu ISEP, University of California, OLD QCD/Charbon Lab
Research Group
OLD QCD/Charbon Lab
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Published Date

12-10-2017

Language

English

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Research Group

OLD QCD/Charbon Lab

Abstract

The characterization of nanometer CMOS transistors of different aspect ratios at deep-cryogenic temperatures (4 K and 100 mK) is presented for two standard CMOS technologies (40 nm and 160 nm). A detailed understanding of the device physics at those temperatures was developed and captured in an augmented MOS11/PSP model. The accuracy of the proposed model is demonstrated by matching simulations and measurements for DC and time-domain at 4 K and, for the first time, at 100 mK.