BTI analysis of SRAM write driver

Conference paper (2015)

Authors

I.O. Agbo Computer Engineering - EEMCS
M. Taouil Computer Engineering - EEMCS
S. Hamdioui Computer Engineering - EEMCS
P Weckx External organisation
S Cosemans External organisation
Francky Catthoor External organisation
Research Group
Computer Engineering (EEMCS) (TU Delft)
More Info
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Published Date

2015

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

Bias Temperature Instability (BTI) has become a major reliability challenge for nano-scaled devices. This paper presents BTI analysis for the SRAM write driver. Its evaluation metric, the write delay (WD), is analyzed for various supply voltages and temperatures for three technology nodes, i.e., 45nm, 32nm, and 22nm. The results show that as technology scales down, BTI impact on write delay (i.e., its average and +/- 3σ variations) increases; the 22nm design can degrade up to 1.9x more than the 45nm design at nominal operation conditions. In addition, the result shows that an increment in supply voltage (i.e., from -10% Vdd to +10% Vdd) increases the relative write delay during the operational lifetime. Furthermore, the results show that a temperature increment accelerates the BTI induced write delay significantly; while at 298K the degradation is up to 4.7%, it increases to 41.4% at 398K for the 22nm technology node.