Backside contacting of individual signals in multilayer ICs for chip forensics

Abstract

Chip forensics has become an important aspect of law enforcement for retrieving data from data carriers. Improving data encryption techniques, smaller technology nodes and increasing chip design complexity instigate the constant need for new software and hardware hacking methods. The work presented in this thesis investigates the potential of a new hardware hacking method named backside contacting. This method aims to connect a probe to one of the bottom interconnects through the backside to listen to the signals sent over that interconnect.
For this purpose, a recipe has been developed. This recipe is a workflow of numerous processes and steps. Several methods like delayering, cross-sectioning and infra-red (IR) imaging were developed to obtain information about the layout and technology of the chip. Atomic layer deposition (ALD), induction coupled plasma enhanced chemical vapour deposition (ICPECVD) and a focussed ion beam (FIB) were used to create structures on the die, in order to realize a backside interconnect. Finally, various setups were built to test the chip throughout the recipe.
The study shows that each step is possible without losing the data on the chip. The yield of surviving chips after each step, however, should be increased to establish a full backside contact while keeping the chip alive. The study also indicates that there remains considerable potential for improvement within each step. The results are promising and justify further research into the method of backside contacting.