Optimizing stresses for testing DRAM cell defects using electrical simulations

Conference paper (2003)

Authors

Z. Al-Ars Computer Engineering - EEMCS
AJ van de Goor Computer Engineering - EEMCS
J Braun External organisation
D Richter External organisation
Research Group
Computer Engineering (EEMCS) (TU Delft)
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Published Date

2003

Language

Undefined/Unknown

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering