Hierarchical Memory Diagnosis

Conference paper (2022)

Authors

G. Cardoso Medeiros Quantum & Computer Engineering
M. Fieback Computer Engineering - EEMCS
A.B. Gebregiorgis Computer Engineering - EEMCS
M. Taouil Computer Engineering - EEMCS
Leticia Bolzani Poehls Rheinisch-Westfälische Technische Hochschule
S. Hamdioui Quantum & Computer Engineering
Research Group
Computer Engineering (EEMCS) (TU Delft)
Copyright: © 2022 G. Cardoso Medeiros, M. Fieback, A.B. Gebregiorgis, M. Taouil, L. B. Poehls, S. Hamdioui
DOI: https://doi.org/10.1109/ETS54262.2022.9810467
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Published Date

2022

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

High-quality memory diagnosis methodologies are critical enablers for scaled memory devices as they reduce time to market and provide valuable information regarding test escapes and customer returns. This paper presents an efficient Hierarchical Memory Diagnosis (HMD) approach that accurately diagnoses faults in the entire memory. Faults are diagnosed hierarchically; first, their location, then their nature (i.e., static or dynamic), and finally, their functional fault model. The HMD approach leads to a more accurate diagnostic, enabling the precise identification of yield loss causes.

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