AP

A.P. Pereira de Azevedo Filho

20 records found

Authored

Virtual execution platforms for mixed-time-criticality systems: The CompSOC architecture and design flow

Scalable parallel programming applied to H.264/AVC decoding

Architecture and design flow for a debug event distribution interconnect

Efficient execution of video applications on heterogeneous multi- and many-core processors,
Doctoral thesis (2011) - A.P. Pereira de Azevedo Filho

An Instruction to Accelerate Software Caches
Conference paper (2011) - A.P. Pereira de Azevedo Filho, B.H.H. Juurlink

The SARC architecture

A multidimensional software cache for scratchpad-based systems

An efficient software cache for H.264 motion compensation
Conference paper (2009) - A.P. Pereira de Azevedo Filho, B.H.H. Juurlink

Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture

Scalability of macroblock-level parallelism for H.264 decoding

Scalar processing overhead on SIMD-only architectures
Conference paper (2009) - A.P. Pereira de Azevedo Filho, B.H.H. Juurlink

Parallel H.264 decoding on an embedded multicore processor

Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture

Exploiting parallelism of deblocking filter of H.264 on DTA architecture

Parallel Scalability of H.264

Analyses of video filtering on the cell processor

Parallel scalability of video decoders

Analyzing scalability of deblocking filter of H.264 via TLP exploitation in a new many-core architecture

Analysis of video filtering on the cell processor

H.264/AVC HDTV motion compensation soft IP