In this contribution we present the developments and current performance of calibration substrates manufactured on 150 mm Quartz wafers (675 μm thick) based on a CMOS process technology. The passive structures required to realize on-wafer vector network analyzer calibration standards are benchmarked against commercially available (i.e., Alumina) substrates. First, an analysis of the process stability is presented for both reflective and resistive impedances across the entire wafer (i.e., 24 dies). Full-wave EM simulations are employed to realize accurate calibration artefact models aiming to achieve state-of-the-art calibration accuracy. The calibration quality in finally benchmarked on an independent line realized in the back-end-of-line of a Silicon based technology up to 67.5 GHz.@en