Spin-transfer-torque magnetic random access memory (STT-MRAM) is regarded as one of the most promising non-volatile memory (NVM) technologies, which has the potential to replace the traditional memories in the modern memory hierarchy. Due to some advantages such as non-volatility, fast access speed, low leakage power and high density, more and more research attention is being paid to STT-MRAM. To enable the mass production of STT-MRAM, high-quality and cost-efficient test solutions are the prerequisites. In this thesis, the comprehensive investigation for testing interconnect and contact defects in STT-MRAMs will be presented. The complete defect space for interconnect and contact defects in STT-MRAMs is systematically defined, which are modelled as linear resistors. All theoretically possible faults are defined in a fault space, followed by a methodology to validate these faults under inter-cell magnetic coupling in the presence of defined defects. In this way, accurate fault modelling is performed to guarantee the occurrence of realistic faults in STT-MRAMs. We observed the specific STT-MRAM fault model—passive neighborhood pattern sensitive fault (PNPSF). Based on the fault validation results, an effective march test algorithm(7N) is proposed for interconnect and contact defects in STT-MRAMs.