Gate Driver Design for Solid-State Circuit Breaker with Integrated Latch Current Limiter in Shipboard DC Systems

Abstract

This paper proposes an integrated gate driver featuring soft turn-off and current limiting for a solid-state circuit breaker in primary shipboard DC systems. The added functionalities allow solid-state circuit breakers to mitigate part of the voltage resonances caused by a hard turn-off, and to reduce unnecessary tripping during overloading events. The proposed design is based on well-known DC protection strategies, which are enhanced by the custom gate driver, simulated in SPICE software. The paper shows that the proposed strategy effectively attenuates the adverse effects of the hard turn-off present in popular off-the-shelf devices, while effectively breaking the fault current. The low propagation delay of the selected components facilitates the rapid break of the current, reaching approximately 69A peak. In addition, the latch current limiter prevents the feeder from overloading, creating a voltage drop of 51% for tens of nanoseconds. The results are promising in motivating future prototyping of the design in an attempt to accelerate the acceptance of shipboard DC systems.