A Low-Power Digitally-Programmable Variable Gain Amplifier in 65 nm CMOS

Conference paper (2010)

Authors

A. Zjajo Signal Processing Systems
Mingxin Song Harbin University of Science and Technology
Research Group
Signal Processing Systems
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Published Date

2010

Language

English

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Research Group

Signal Processing Systems

Abstract

This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm2 and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.


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