A CMOS smart temperature sensor with a 3¿ inaccuracy of ±0.5°C from -50°C to 120°C

Journal article (2005)

Authors

M.A.P. Pertijs Electronic Instrumentation -

A Niederkorn External organisation

X Ma External organisation

B McKillop External organisation

A. Bakker Electronic Instrumentation -

J.H. Huijsing Electronic Instrumentation -

Research Group

Electronic Instrumentation () (TU Delft)

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Published Date

2005

Language

Undefined/Unknown

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Electronic Instrumentation

Abstract

A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within /spl plusmn/0.5/spl deg/C (3/spl sigma/) from -50/spl deg/C to 120/spl deg/C.