Detailed derivation and minimization of the equivalent parasitic capacitances of a high-voltage multiplier based on the complete model

Wang, J.; de Haan, S.W.H.; Ferreira, J.A.

Detailed derivation and minimization of the equivalent parasitic capacitances of a high-voltage multiplier based on the complete model

Journal article (2015)

Authors

J. Wang Electrical Power Processing

S.W.H. de Haan Electrical Power Processing

J.A. Ferreira Electrical Power Processing

Research Group

Electrical Power Processing

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Published Date

2015

Language

English

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Research Group

Electrical Power Processing

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