Maximizing Systolic Array Efficiency to Accelerate the PairHMM Forward Algorithm

Conference paper (2016)

Authors

Johan Peltenburg Computer Engineering - EEMCS
S. Ren Computer Engineering - EEMCS
Zaid Al-Ars Computer Engineering - EEMCS
Research Group
Computer Engineering (EEMCS) (TU Delft)
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Published Date

2016-12

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

In the analysis of next-generation DNA sequencing data, Hidden Markov Models (HMMs) are used to perform variant calling between DNA sequences and a reference genome. The PairHMM model is solved by the Forward Algorithm, for which the performance and power efficiency can be increased tremendously using systolic arrays (SAs) in FPGAs. We model the performance characteristics of such SAs, and propose a novel architecture that allows the computational units to continuously perform useful work on the input data. The implementation achieves up to 90\% of the theoretical throughput for a real dataset. The implementation of the proposed architecture achieves more than 2.5x throughput over the state-of-the-art on a similar contemporary platform.

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