Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnects at test access mechanism

Journal article (2007)

Authors

A Amory External organisation
K.G.W. Goossens Computer Engineering - EEMCS
E. J. Marinissen External organisation
M Lubaszewski External organisation
F Moraes External organisation
Research Group
Computer Engineering (EEMCS) (TU Delft)
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Published Date

2007

Language

Undefined/Unknown

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering